1/**************************************************************************/ 2/* */ 3/* Copyright (c) Microsoft Corporation. All rights reserved. */ 4/* */ 5/* This software is licensed under the Microsoft Software License */ 6/* Terms for Microsoft Azure RTOS. Full text of the license can be */ 7/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ 8/* and in the root directory of this software. */ 9/* */ 10/**************************************************************************/ 11 12 13/**************************************************************************/ 14/**************************************************************************/ 15/** */ 16/** ThreadX Component */ 17/** */ 18/** Thread */ 19/** */ 20/**************************************************************************/ 21/**************************************************************************/ 22 23#ifdef TX_INCLUDE_USER_DEFINE_FILE 24#include "tx_user.h" 25#endif 26 27 SECTION `.text`:CODE:NOROOT(2) 28 THUMB 29/**************************************************************************/ 30/* */ 31/* FUNCTION RELEASE */ 32/* */ 33/* _tx_thread_stack_build Cortex-Mxx/IAR */ 34/* 6.1.8 */ 35/* AUTHOR */ 36/* */ 37/* Scott Larson, Microsoft Corporation */ 38/* */ 39/* DESCRIPTION */ 40/* */ 41/* This function builds a stack frame on the supplied thread's stack. */ 42/* The stack frame results in a fake interrupt return to the supplied */ 43/* function pointer. */ 44/* */ 45/* INPUT */ 46/* */ 47/* thread_ptr Pointer to thread control blk */ 48/* function_ptr Pointer to return function */ 49/* */ 50/* OUTPUT */ 51/* */ 52/* None */ 53/* */ 54/* CALLS */ 55/* */ 56/* None */ 57/* */ 58/* CALLED BY */ 59/* */ 60/* _tx_thread_create Create thread service */ 61/* */ 62/* RELEASE HISTORY */ 63/* */ 64/* DATE NAME DESCRIPTION */ 65/* */ 66/* 09-30-2020 Scott Larson Initial Version 6.1 */ 67/* */ 68/**************************************************************************/ 69// VOID _tx_thread_stack_build(TX_THREAD *thread_ptr, VOID (*function_ptr)(VOID)) 70// { 71 PUBLIC _tx_thread_stack_build 72_tx_thread_stack_build: 73 /* Build a fake interrupt frame. The form of the fake interrupt stack 74 on the Cortex-M should look like the following after it is built: 75 76 Stack Top: 77 LR Interrupted LR (LR at time of PENDSV) 78 r4 Initial value for r4 79 r5 Initial value for r5 80 r6 Initial value for r6 81 r7 Initial value for r7 82 r8 Initial value for r8 83 r9 Initial value for r9 84 r10 Initial value for r10 85 r11 Initial value for r11 86 r0 Initial value for r0 (Hardware stack starts here!!) 87 r1 Initial value for r1 88 r2 Initial value for r2 89 r3 Initial value for r3 90 r12 Initial value for r12 91 lr Initial value for lr 92 pc Initial value for pc 93 xPSR Initial value for xPSR 94 95 Stack Bottom: (higher memory address) */ 96 97 LDR r2, [r0, #16] // Pickup end of stack area 98 BIC r2, r2, #0x7 // Align frame for 8-byte alignment 99 SUB r2, r2, #68 // Subtract frame size 100#ifdef TX_SINGLE_MODE_SECURE 101 LDR r3, =0xFFFFFFFD // Build initial LR value for secure mode 102#else 103 LDR r3, =0xFFFFFFBC // Build initial LR value to return to non-secure PSP 104#endif 105 STR r3, [r2, #0] // Save on the stack 106 107 /* Actually build the stack frame. */ 108 109 MOV r3, #0 // Build initial register value 110 STR r3, [r2, #4] // Store initial r4 111 STR r3, [r2, #8] // Store initial r5 112 STR r3, [r2, #12] // Store initial r6 113 STR r3, [r2, #16] // Store initial r7 114 STR r3, [r2, #20] // Store initial r8 115 STR r3, [r2, #24] // Store initial r9 116 STR r3, [r2, #28] // Store initial r10 117 STR r3, [r2, #32] // Store initial r11 118 119 /* Hardware stack follows. */ 120 121 STR r3, [r2, #36] // Store initial r0 122 STR r3, [r2, #40] // Store initial r1 123 STR r3, [r2, #44] // Store initial r2 124 STR r3, [r2, #48] // Store initial r3 125 STR r3, [r2, #52] // Store initial r12 126 MOV r3, #0xFFFFFFFF // Poison EXC_RETURN value 127 STR r3, [r2, #56] // Store initial lr 128 STR r1, [r2, #60] // Store initial pc 129 MOV r3, #0x01000000 // Only T-bit need be set 130 STR r3, [r2, #64] // Store initial xPSR 131 132 /* Setup stack pointer. */ 133 // thread_ptr -> tx_thread_stack_ptr = r2; 134 135 STR r2, [r0, #8] // Save stack pointer in thread's 136 // control block 137 BX lr // Return to caller 138// } 139 END 140