1/**************************************************************************/
2/*                                                                        */
3/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
4/*                                                                        */
5/*       This software is licensed under the Microsoft Software License   */
6/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
7/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
8/*       and in the root directory of this software.                      */
9/*                                                                        */
10/**************************************************************************/
11
12
13/**************************************************************************/
14/**************************************************************************/
15/**                                                                       */
16/** ThreadX Component                                                     */
17/**                                                                       */
18/**   Initialize                                                          */
19/**                                                                       */
20/**************************************************************************/
21/**************************************************************************/
22
23#ifdef TX_INCLUDE_USER_DEFINE_FILE
24#include "tx_user.h"
25#endif
26
27SYSTEM_CLOCK        =     6000000
28SYSTICK_CYCLES      =     ((SYSTEM_CLOCK / 100) -1)
29
30/* Setup the stack and heap areas.  */
31
32STACK_SIZE          =     0x00000400
33HEAP_SIZE           =     0x00000000
34
35/**************************************************************************/
36/*                                                                        */
37/*  FUNCTION                                               RELEASE        */
38/*                                                                        */
39/*    _tx_initialize_low_level                          Cortex-Mxx/AC6    */
40/*                                                           6.2.1        */
41/*  AUTHOR                                                                */
42/*                                                                        */
43/*    Scott Larson, Microsoft Corporation                                 */
44/*                                                                        */
45/*  DESCRIPTION                                                           */
46/*                                                                        */
47/*    This function is responsible for any low-level processor            */
48/*    initialization, including setting up interrupt vectors, setting     */
49/*    up a periodic timer interrupt source, saving the system stack       */
50/*    pointer for use in ISR processing later, and finding the first      */
51/*    available RAM memory address for tx_application_define.             */
52/*                                                                        */
53/*  INPUT                                                                 */
54/*                                                                        */
55/*    None                                                                */
56/*                                                                        */
57/*  OUTPUT                                                                */
58/*                                                                        */
59/*    None                                                                */
60/*                                                                        */
61/*  CALLS                                                                 */
62/*                                                                        */
63/*    None                                                                */
64/*                                                                        */
65/*  CALLED BY                                                             */
66/*                                                                        */
67/*    _tx_initialize_kernel_enter           ThreadX entry function        */
68/*                                                                        */
69/*  RELEASE HISTORY                                                       */
70/*                                                                        */
71/*    DATE              NAME                      DESCRIPTION             */
72/*                                                                        */
73/*  09-30-2020      Scott Larson            Initial Version 6.1           */
74/*  03-08-2023      Scott Larson            Include tx_user.h,            */
75/*                                            resulting in version 6.2.1  */
76/*                                                                        */
77/**************************************************************************/
78// VOID   _tx_initialize_low_level(VOID)
79// {
80    .section .text
81    .balign 4
82    .syntax unified
83    .eabi_attribute Tag_ABI_align_preserved, 1
84    .global  _tx_initialize_low_level
85    .thumb_func
86.type _tx_initialize_low_level, function
87_tx_initialize_low_level:
88
89    /* Disable interrupts during ThreadX initialization.  */
90    CPSID   i
91
92    /* Set base of available memory to end of non-initialised RAM area.  */
93    LDR     r0, =_tx_initialize_unused_memory       // Build address of unused memory pointer
94    LDR     r1, =Image$$ARM_LIB_STACK$$ZI$$Limit    // Build first free address
95    ADD     r1, r1, #4                              //
96    STR     r1, [r0]                                // Setup first unused memory pointer
97
98    /* Setup Vector Table Offset Register.  */
99    MOV     r0, #0xE000E000                         // Build address of NVIC registers
100    LDR     r1, =__Vectors                          // Pickup address of vector table
101    STR     r1, [r0, #0xD08]                        // Set vector table address
102
103    /* Enable the cycle count register.  */
104    LDR     r0, =0xE0001000                         // Build address of DWT register
105    LDR     r1, [r0]                                // Pickup the current value
106    ORR     r1, r1, #1                              // Set the CYCCNTENA bit
107    STR     r1, [r0]                                // Enable the cycle count register
108
109    /* Set system stack pointer from vector value.  */
110    LDR     r0, =_tx_thread_system_stack_ptr        // Build address of system stack pointer
111    LDR     r1, =__Vectors                          // Pickup address of vector table
112    LDR     r1, [r1]                                // Pickup reset stack pointer
113    STR     r1, [r0]                                // Save system stack pointer
114
115    /* Configure SysTick.  */
116    MOV     r0, #0xE000E000                         // Build address of NVIC registers
117    LDR     r1, =SYSTICK_CYCLES
118    STR     r1, [r0, #0x14]                         // Setup SysTick Reload Value
119    MOV     r1, #0x7                                // Build SysTick Control Enable Value
120    STR     r1, [r0, #0x10]                         // Setup SysTick Control
121
122    /* Configure handler priorities.  */
123    LDR     r1, =0x00000000                         // Rsrv, UsgF, BusF, MemM
124    STR     r1, [r0, #0xD18]                        // Setup System Handlers 4-7 Priority Registers
125
126    LDR     r1, =0xFF000000                         // SVCl, Rsrv, Rsrv, Rsrv
127    STR     r1, [r0, #0xD1C]                        // Setup System Handlers 8-11 Priority Registers
128                                                    // Note: SVC must be lowest priority, which is 0xFF
129
130    LDR     r1, =0x40FF0000                         // SysT, PnSV, Rsrv, DbgM
131    STR     r1, [r0, #0xD20]                        // Setup System Handlers 12-15 Priority Registers
132                                                    // Note: PnSV must be lowest priority, which is 0xFF
133
134    /* Return to caller.  */
135    BX      lr
136// }
137
138
139/* Define shells for each of the unused vectors.  */
140    .section .text
141    .balign 4
142    .syntax unified
143    .eabi_attribute Tag_ABI_align_preserved, 1
144    .global  __tx_BadHandler
145    .thumb_func
146.type __tx_BadHandler, function
147__tx_BadHandler:
148    B       __tx_BadHandler
149
150
151    .section .text
152    .balign 4
153    .syntax unified
154    .eabi_attribute Tag_ABI_align_preserved, 1
155    .global  __tx_IntHandler
156    .thumb_func
157.type __tx_IntHandler, function
158__tx_IntHandler:
159// VOID InterruptHandler (VOID)
160// {
161    PUSH    {r0,lr}     // Save LR (and dummy r0 to maintain stack alignment)
162#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
163    BL      _tx_execution_isr_enter             // Call the ISR enter function
164#endif
165    /* Do interrupt handler work here */
166    /* .... */
167#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
168    BL      _tx_execution_isr_exit              // Call the ISR exit function
169#endif
170    POP     {r0,lr}
171    BX      LR
172// }
173
174
175    .section .text
176    .balign 4
177    .syntax unified
178    .eabi_attribute Tag_ABI_align_preserved, 1
179    .global  SysTick_Handler
180    .thumb_func
181.type SysTick_Handler, function
182SysTick_Handler:
183// VOID TimerInterruptHandler (VOID)
184// {
185    PUSH    {r0,lr}     // Save LR (and dummy r0 to maintain stack alignment)
186#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
187    BL      _tx_execution_isr_enter             // Call the ISR enter function
188#endif
189    BL      _tx_timer_interrupt
190#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
191    BL      _tx_execution_isr_exit              // Call the ISR exit function
192#endif
193    POP     {r0,lr}
194    BX      LR
195// }
196
197
198    .section .text
199    .balign 4
200    .syntax unified
201    .eabi_attribute Tag_ABI_align_preserved, 1
202    .global  HardFault_Handler
203    .thumb_func
204.type HardFault_Handler, function
205HardFault_Handler:
206    B       HardFault_Handler
207
208
209    .section .text
210    .balign 4
211    .syntax unified
212    .eabi_attribute Tag_ABI_align_preserved, 1
213    .global  UsageFault_Handler
214    .thumb_func
215.type UsageFault_Handler, function
216UsageFault_Handler:
217    CPSID   i                                       // Disable interrupts
218    // Check for stack limit fault
219    LDR     r0, =0xE000ED28                         // CFSR address
220    LDR     r1,[r0]                                 // Pick up CFSR
221    TST     r1, #0x00100000                         // Check for Stack Overflow
222_unhandled_usage_loop:
223    BEQ     _unhandled_usage_loop                   // If not stack overflow then loop
224
225    // Handle stack overflow
226    STR     r1, [r0]                                // Clear CFSR flag(s)
227
228#ifdef __ARM_PCS_VFP
229    LDR     r0, =0xE000EF34                         // Cleanup FPU context: Load FPCCR address
230    LDR     r1, [r0]                                // Load FPCCR
231    BIC     r1, r1, #1                              // Clear the lazy preservation active bit
232    STR     r1, [r0]                                // Store the value
233#endif
234
235    LDR     r0, =_tx_thread_current_ptr             // Build current thread pointer address
236    LDR     r0,[r0]                                 // Pick up current thread pointer
237    PUSH    {r0,lr}                                 // Save LR (and r0 to maintain stack alignment)
238    BL      _tx_thread_stack_error_handler          // Call ThreadX/user handler
239    POP     {r0,lr}                                 // Restore LR and dummy reg
240
241#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
242    // Call the thread exit function to indicate the thread is no longer executing.
243    PUSH    {r0, lr}                                // Save LR (and r0 just for alignment)
244    BL      _tx_execution_thread_exit               // Call the thread exit function
245    POP     {r0, lr}                                // Recover LR
246#endif
247
248    MOV     r1, #0                                  // Build NULL value
249    LDR     r0, =_tx_thread_current_ptr             // Pickup address of current thread pointer
250    STR     r1, [r0]                                // Clear current thread pointer
251
252    // Return from UsageFault_Handler exception
253    LDR     r0, =0xE000ED04                         // Load ICSR
254    LDR     r1, =0x10000000                         // Set PENDSVSET bit
255    STR     r1, [r0]                                // Store ICSR
256    DSB                                             // Wait for memory access to complete
257    CPSIE   i                                       // Enable interrupts
258    BX      lr                                      // Return from exception
259
260
261
262    .section .text
263    .balign 4
264    .syntax unified
265    .eabi_attribute Tag_ABI_align_preserved, 1
266    .global  __tx_NMIHandler
267    .thumb_func
268.type __tx_NMIHandler, function
269__tx_NMIHandler:
270    B       __tx_NMIHandler
271
272
273    .section .text
274    .balign 4
275    .syntax unified
276    .eabi_attribute Tag_ABI_align_preserved, 1
277    .global  __tx_DBGHandler
278    .thumb_func
279.type __tx_DBGHandler, function
280__tx_DBGHandler:
281    B       __tx_DBGHandler
282
283    .end
284