1;/**************************************************************************/
2;/*                                                                        */
3;/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
4;/*                                                                        */
5;/*       This software is licensed under the Microsoft Software License   */
6;/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
7;/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
8;/*       and in the root directory of this software.                      */
9;/*                                                                        */
10;/**************************************************************************/
11;
12;
13;/**************************************************************************/
14;/**************************************************************************/
15;/**                                                                       */
16;/** ThreadX Component                                                     */
17;/**                                                                       */
18;/**   Initialize                                                          */
19;/**                                                                       */
20;/**************************************************************************/
21;/**************************************************************************/
22;
23
24    extern __tx_initialize_unused_memory
25
26    section .text:CODE:ROOT
27
28;
29;/**************************************************************************/
30;/*                                                                        */
31;/*  FUNCTION                                               RELEASE        */
32;/*                                                                        */
33;/*    _tx_initialize_low_level                             RXv3/IAR       */
34;/*                                                           6.1.11       */
35;/*  AUTHOR                                                                */
36;/*                                                                        */
37;/*    William E. Lamie, Microsoft Corporation                             */
38;/*                                                                        */
39;/*  DESCRIPTION                                                           */
40;/*                                                                        */
41;/*    This function is responsible for any low-level processor            */
42;/*    initialization, including setting up interrupt vectors, setting     */
43;/*    up a periodic timer interrupt source, saving the system stack       */
44;/*    pointer for use in ISR processing later, and finding the first      */
45;/*    available RAM memory address for tx_application_define.             */
46;/*                                                                        */
47;/*  INPUT                                                                 */
48;/*                                                                        */
49;/*    None                                                                */
50;/*                                                                        */
51;/*  OUTPUT                                                                */
52;/*                                                                        */
53;/*    None                                                                */
54;/*                                                                        */
55;/*  CALLS                                                                 */
56;/*                                                                        */
57;/*    None                                                                */
58;/*                                                                        */
59;/*  CALLED BY                                                             */
60;/*                                                                        */
61;/*    _tx_initialize_kernel_enter           ThreadX entry function        */
62;/*                                                                        */
63;/*  RELEASE HISTORY                                                       */
64;/*                                                                        */
65;/*    DATE              NAME                      DESCRIPTION             */
66;/*                                                                        */
67;/*  06-02-2021     William E. Lamie         Initial Version 6.1.7         */
68;/*  10-15-2021     William E. Lamie         Modified comment(s),          */
69;/*                                            resulting in version 6.1.9  */
70;/*  01-31-2022     William E. Lamie         Modified comment(s),          */
71;/*                                            resulting in version 6.1.10 */
72;/*  04-25-2022     William E. Lamie         Modified comment(s),          */
73;/*                                            resulting in version 6.1.11 */
74;/*                                                                        */
75;/**************************************************************************/
76    public __tx_initialize_low_level
77
78__tx_initialize_low_level:
79
80;    /* Save the first available memory address.  */
81;    _tx_initialize_unused_memory =  (VOID_PTR) &free_mem_start;
82;
83    MOV.L    #__tx_free_memory_start, R1        ; Pickup unused memory address
84    MOV.L    #__tx_initialize_unused_memory,R2
85    MOV.L    R1,[R2]                            ; Save first free memory address
86
87;   /* Set priority of SWINT to 1. */
88    MOV.L    #0x87303, r1
89    MOV.L    #1, r2
90    MOV.B    r2, [r1]
91
92;   /* Enable SWINT. */
93    MOV.L    #0x87203, r1
94    MOV.B    [r1], r2
95    OR       #(1 << 3), r2
96    MOV.B    r2, [r1]
97
98    RTS
99
100    section FREEMEM:DATA
101    public __tx_free_memory_start
102__tx_free_memory_start
103    DS32    4
104
105    END
106
107