1/**************************************************************************/ 2/* */ 3/* Copyright (c) Microsoft Corporation. All rights reserved. */ 4/* */ 5/* This software is licensed under the Microsoft Software License */ 6/* Terms for Microsoft Azure RTOS. Full text of the license can be */ 7/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ 8/* and in the root directory of this software. */ 9/* */ 10/**************************************************************************/ 11 12 13/**************************************************************************/ 14/**************************************************************************/ 15/** */ 16/** ThreadX Component */ 17/** */ 18/** Initialize */ 19/** */ 20/**************************************************************************/ 21/**************************************************************************/ 22 23 24/* #define TX_SOURCE_CODE */ 25 26 27/* Include necessary system files. */ 28 29/* #include "tx_api.h" 30 #include "tx_initialize.h" 31 #include "tx_thread.h" 32 #include "tx_timer.h" */ 33 34 EXTERN _tx_thread_system_stack_ptr 35 EXTERN _tx_initialize_unused_memory 36 EXTERN _tx_thread_context_save 37 EXTERN _tx_thread_context_restore 38 EXTERN _tx_timer_interrupt 39 40 RSEG FREE_MEM:DATA 41 PUBLIC __tx_free_memory_start 42__tx_free_memory_start: 43 DS32 4 44 45 46 SECTION `.text`:CODE:REORDER:NOROOT(2) 47 CODE 48/**************************************************************************/ 49/* */ 50/* FUNCTION RELEASE */ 51/* */ 52/* _tx_initialize_low_level RISC-V32/IAR */ 53/* 6.1 */ 54/* AUTHOR */ 55/* */ 56/* William E. Lamie, Microsoft Corporation */ 57/* Tom van Leeuwen, Technolution B.V. */ 58/* */ 59/* DESCRIPTION */ 60/* */ 61/* This function is responsible for any low-level processor */ 62/* initialization, including setting up interrupt vectors, setting */ 63/* up a periodic timer interrupt source, saving the system stack */ 64/* pointer for use in ISR processing later, and finding the first */ 65/* available RAM memory address for tx_application_define. */ 66/* */ 67/* INPUT */ 68/* */ 69/* None */ 70/* */ 71/* OUTPUT */ 72/* */ 73/* None */ 74/* */ 75/* CALLS */ 76/* */ 77/* None */ 78/* */ 79/* CALLED BY */ 80/* */ 81/* _tx_initialize_kernel_enter ThreadX entry function */ 82/* */ 83/* RELEASE HISTORY */ 84/* */ 85/* DATE NAME DESCRIPTION */ 86/* */ 87/* 09-30-2020 William E. Lamie Initial Version 6.1 */ 88/* */ 89/**************************************************************************/ 90/* VOID _tx_initialize_low_level(VOID) 91{ */ 92 PUBLIC _tx_initialize_low_level 93_tx_initialize_low_level: 94 sw sp, _tx_thread_system_stack_ptr, t0 ; Save system stack pointer 95 96 la t0, __tx_free_memory_start ; Pickup first free address 97 sw t0, _tx_initialize_unused_memory, t1 ; Save unused memory address 98 99 ret 100 101 102 /* Define the actual timer interrupt/exception handler. */ 103 104 PUBLIC _tx_timer_interrupt_handler 105 PUBLIC __minterrupt_000007 106 EXTWEAK __require_minterrupt_vector_table 107_tx_timer_interrupt_handler: 108__minterrupt_000007: 109 REQUIRE __require_minterrupt_vector_table 110 111 112 /* Before calling _tx_thread_context_save, we have to allocate an interrupt 113 stack frame and save the current value of x1 (ra). */ 114#if __iar_riscv_base_isa == rv32e 115 addi sp, sp, -260 ; Allocate space for all registers - with floating point enabled 116#else 117 addi sp, sp, -128 ; Allocate space for all registers - without floating point enabled 118#endif 119 sw x1, 0x70(sp) ; Store RA 120 call _tx_thread_context_save ; Call ThreadX context save 121 122 /* Call the ThreadX timer routine. */ 123 call _tx_timer_interrupt ; Call timer interrupt handler 124 125 /* Timer interrupt processing is done, jump to ThreadX context restore. */ 126 j _tx_thread_context_restore ; Jump to ThreadX context restore function. Note: this does not return! 127 128 129 END 130