1/**************************************************************************/ 2/* */ 3/* Copyright (c) Microsoft Corporation. All rights reserved. */ 4/* */ 5/* This software is licensed under the Microsoft Software License */ 6/* Terms for Microsoft Azure RTOS. Full text of the license can be */ 7/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ 8/* and in the root directory of this software. */ 9/* */ 10/**************************************************************************/ 11 12 13/**************************************************************************/ 14/**************************************************************************/ 15/** */ 16/** ThreadX Component */ 17/** */ 18/** ThreadX MISRA Compliance */ 19/** */ 20/**************************************************************************/ 21/**************************************************************************/ 22 23#ifdef TX_INCLUDE_USER_DEFINE_FILE 24#include "tx_user.h" 25#endif 26 27 #define SHT_PROGBITS 0x1 28 29 EXTERN __aeabi_memset 30 EXTERN _tx_thread_current_ptr 31 EXTERN _tx_thread_interrupt_disable 32 EXTERN _tx_thread_interrupt_restore 33 EXTERN _tx_thread_stack_analyze 34 EXTERN _tx_thread_stack_error_handler 35 EXTERN _tx_thread_system_state 36#ifdef TX_ENABLE_EVENT_TRACE 37 EXTERN _tx_trace_buffer_current_ptr 38 EXTERN _tx_trace_buffer_end_ptr 39 EXTERN _tx_trace_buffer_start_ptr 40 EXTERN _tx_trace_event_enable_bits 41 EXTERN _tx_trace_full_notify_function 42 EXTERN _tx_trace_header_ptr 43#endif 44 45 PUBLIC _tx_misra_always_true 46 PUBLIC _tx_misra_block_pool_to_uchar_pointer_convert 47 PUBLIC _tx_misra_byte_pool_to_uchar_pointer_convert 48 PUBLIC _tx_misra_char_to_uchar_pointer_convert 49 PUBLIC _tx_misra_const_char_to_char_pointer_convert 50#ifdef TX_ENABLE_EVENT_TRACE 51 PUBLIC _tx_misra_entry_to_uchar_pointer_convert 52#endif 53 PUBLIC _tx_misra_indirect_void_to_uchar_pointer_convert 54 PUBLIC _tx_misra_memset 55 PUBLIC _tx_misra_message_copy 56#ifdef TX_ENABLE_EVENT_TRACE 57 PUBLIC _tx_misra_object_to_uchar_pointer_convert 58#endif 59 PUBLIC _tx_misra_pointer_to_ulong_convert 60 PUBLIC _tx_misra_status_get 61 PUBLIC _tx_misra_thread_stack_check 62#ifdef TX_ENABLE_EVENT_TRACE 63 PUBLIC _tx_misra_time_stamp_get 64#endif 65 PUBLIC _tx_misra_timer_indirect_to_void_pointer_convert 66 PUBLIC _tx_misra_timer_pointer_add 67 PUBLIC _tx_misra_timer_pointer_dif 68#ifdef TX_ENABLE_EVENT_TRACE 69 PUBLIC _tx_misra_trace_event_insert 70#endif 71 PUBLIC _tx_misra_uchar_pointer_add 72 PUBLIC _tx_misra_uchar_pointer_dif 73 PUBLIC _tx_misra_uchar_pointer_sub 74 PUBLIC _tx_misra_uchar_to_align_type_pointer_convert 75 PUBLIC _tx_misra_uchar_to_block_pool_pointer_convert 76#ifdef TX_ENABLE_EVENT_TRACE 77 PUBLIC _tx_misra_uchar_to_entry_pointer_convert 78 PUBLIC _tx_misra_uchar_to_header_pointer_convert 79#endif 80 PUBLIC _tx_misra_uchar_to_indirect_byte_pool_pointer_convert 81 PUBLIC _tx_misra_uchar_to_indirect_uchar_pointer_convert 82#ifdef TX_ENABLE_EVENT_TRACE 83 PUBLIC _tx_misra_uchar_to_object_pointer_convert 84#endif 85 PUBLIC _tx_misra_uchar_to_void_pointer_convert 86 PUBLIC _tx_misra_ulong_pointer_add 87 PUBLIC _tx_misra_ulong_pointer_dif 88 PUBLIC _tx_misra_ulong_pointer_sub 89 PUBLIC _tx_misra_ulong_to_pointer_convert 90 PUBLIC _tx_misra_ulong_to_thread_pointer_convert 91 PUBLIC _tx_misra_user_timer_pointer_get 92 PUBLIC _tx_misra_void_to_block_pool_pointer_convert 93 PUBLIC _tx_misra_void_to_byte_pool_pointer_convert 94 PUBLIC _tx_misra_void_to_event_flags_pointer_convert 95 PUBLIC _tx_misra_void_to_indirect_uchar_pointer_convert 96 PUBLIC _tx_misra_void_to_mutex_pointer_convert 97 PUBLIC _tx_misra_void_to_queue_pointer_convert 98 PUBLIC _tx_misra_void_to_semaphore_pointer_convert 99 PUBLIC _tx_misra_void_to_thread_pointer_convert 100 PUBLIC _tx_misra_void_to_uchar_pointer_convert 101 PUBLIC _tx_misra_void_to_ulong_pointer_convert 102 PUBLIC _tx_misra_ipsr_get 103 PUBLIC _tx_misra_control_get 104 PUBLIC _tx_misra_control_set 105#ifdef __ARMVFP__ 106 PUBLIC _tx_misra_fpccr_get 107 PUBLIC _tx_misra_vfp_touch 108#endif 109 110 PUBLIC _tx_misra_event_flags_group_not_used 111 PUBLIC _tx_misra_event_flags_set_notify_not_used 112 PUBLIC _tx_misra_queue_not_used 113 PUBLIC _tx_misra_queue_send_notify_not_used 114 PUBLIC _tx_misra_semaphore_not_used 115 PUBLIC _tx_misra_semaphore_put_notify_not_used 116 PUBLIC _tx_misra_thread_entry_exit_notify_not_used 117 PUBLIC _tx_misra_thread_not_used 118 119#ifdef TX_MISRA_ENABLE 120 PUBLIC _tx_version_id 121 122 SECTION `.data`:DATA:REORDER:NOROOT(2) 123 DATA 124// 51 CHAR _tx_version_id[100] = "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX 6.1 MISRA C Compliant *"; 125_tx_version_id: 126 DC8 43H, 6FH, 70H, 79H, 72H, 69H, 67H, 68H 127 DC8 74H, 20H, 28H, 63H, 29H, 20H, 31H, 39H 128 DC8 39H, 36H, 2DH, 32H, 30H, 31H, 38H, 20H 129 DC8 45H, 78H, 70H, 72H, 65H, 73H, 73H, 20H 130 DC8 4CH, 6FH, 67H, 69H, 63H, 20H, 49H, 6EH 131 DC8 63H, 2EH, 20H, 2AH, 20H, 54H, 68H, 72H 132 DC8 65H, 61H, 64H, 58H, 20H, 36H, 2EH, 31H 133 DC8 20H, 4DH, 49H, 53H, 52H, 41H, 20H, 43H 134 DC8 20H, 43H, 6FH, 6DH, 70H, 6CH, 69H, 61H 135 DC8 6EH, 74H, 20H, 2AH, 0 136 DC8 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 137#endif //TX_MISRA_ENABLE 138 139/**************************************************************************/ 140/**************************************************************************/ 141/** */ 142/** VOID _tx_misra_memset(VOID *ptr, UINT value, UINT size); */ 143/** */ 144/**************************************************************************/ 145/**************************************************************************/ 146 147 SECTION `.text`:CODE:NOROOT(1) 148 THUMB 149_tx_misra_memset: 150 PUSH {R4,LR} 151 MOVS R4,R0 152 MOVS R0,R2 153 MOVS R2,R1 154 MOVS R1,R0 155 MOVS R0,R4 156 BL __aeabi_memset 157 POP {R4,PC} // return 158 159/**************************************************************************/ 160/**************************************************************************/ 161/** */ 162/** UCHAR *_tx_misra_uchar_pointer_add(UCHAR *ptr, ULONG amount); */ 163/** */ 164/**************************************************************************/ 165/**************************************************************************/ 166 167 SECTION `.text`:CODE:NOROOT(1) 168 THUMB 169_tx_misra_uchar_pointer_add: 170 ADD R0,R0,R1 171 BX LR // return 172 173 174/**************************************************************************/ 175/**************************************************************************/ 176/** */ 177/** UCHAR *_tx_misra_uchar_pointer_sub(UCHAR *ptr, ULONG amount); */ 178/** */ 179/**************************************************************************/ 180/**************************************************************************/ 181 182 SECTION `.text`:CODE:NOROOT(1) 183 THUMB 184_tx_misra_uchar_pointer_sub: 185 RSBS R1,R1,#+0 186 ADD R0,R0,R1 187 BX LR // return 188 189 190/**************************************************************************/ 191/**************************************************************************/ 192/** */ 193/** ULONG _tx_misra_uchar_pointer_dif(UCHAR *ptr1, UCHAR *ptr2); */ 194/** */ 195/**************************************************************************/ 196/**************************************************************************/ 197 198 SECTION `.text`:CODE:NOROOT(1) 199 THUMB 200_tx_misra_uchar_pointer_dif: 201 SUBS R0,R0,R1 202 BX LR // return 203 204 205/************************************************************************************************************************************/ 206/************************************************************************************************************************************/ 207/** */ 208/** This single function serves all of the below prototypes. */ 209/** */ 210/** ULONG _tx_misra_pointer_to_ulong_convert(VOID *ptr); */ 211/** VOID *_tx_misra_ulong_to_pointer_convert(ULONG input); */ 212/** UCHAR **_tx_misra_indirect_void_to_uchar_pointer_convert(VOID **return_ptr); */ 213/** UCHAR **_tx_misra_uchar_to_indirect_uchar_pointer_convert(UCHAR *pointer); */ 214/** UCHAR *_tx_misra_block_pool_to_uchar_pointer_convert(TX_BLOCK_POOL *pool); */ 215/** TX_BLOCK_POOL *_tx_misra_void_to_block_pool_pointer_convert(VOID *pointer); */ 216/** UCHAR *_tx_misra_void_to_uchar_pointer_convert(VOID *pointer); */ 217/** TX_BLOCK_POOL *_tx_misra_uchar_to_block_pool_pointer_convert(UCHAR *pointer); */ 218/** UCHAR **_tx_misra_void_to_indirect_uchar_pointer_convert(VOID *pointer); */ 219/** TX_BYTE_POOL *_tx_misra_void_to_byte_pool_pointer_convert(VOID *pointer); */ 220/** UCHAR *_tx_misra_byte_pool_to_uchar_pointer_convert(TX_BYTE_POOL *pool); */ 221/** ALIGN_TYPE *_tx_misra_uchar_to_align_type_pointer_convert(UCHAR *pointer); */ 222/** TX_BYTE_POOL **_tx_misra_uchar_to_indirect_byte_pool_pointer_convert(UCHAR *pointer); */ 223/** TX_EVENT_FLAGS_GROUP *_tx_misra_void_to_event_flags_pointer_convert(VOID *pointer); */ 224/** ULONG *_tx_misra_void_to_ulong_pointer_convert(VOID *pointer); */ 225/** TX_MUTEX *_tx_misra_void_to_mutex_pointer_convert(VOID *pointer); */ 226/** TX_QUEUE *_tx_misra_void_to_queue_pointer_convert(VOID *pointer); */ 227/** TX_SEMAPHORE *_tx_misra_void_to_semaphore_pointer_convert(VOID *pointer); */ 228/** VOID *_tx_misra_uchar_to_void_pointer_convert(UCHAR *pointer); */ 229/** TX_THREAD *_tx_misra_ulong_to_thread_pointer_convert(ULONG value); */ 230/** VOID *_tx_misra_timer_indirect_to_void_pointer_convert(TX_TIMER_INTERNAL **pointer); */ 231/** CHAR *_tx_misra_const_char_to_char_pointer_convert(const char *pointer); */ 232/** TX_THREAD *_tx_misra_void_to_thread_pointer_convert(void *pointer); */ 233/** UCHAR *_tx_misra_object_to_uchar_pointer_convert(TX_TRACE_OBJECT_ENTRY *pointer); */ 234/** TX_TRACE_OBJECT_ENTRY *_tx_misra_uchar_to_object_pointer_convert(UCHAR *pointer); */ 235/** TX_TRACE_HEADER *_tx_misra_uchar_to_header_pointer_convert(UCHAR *pointer); */ 236/** TX_TRACE_BUFFER_ENTRY *_tx_misra_uchar_to_entry_pointer_convert(UCHAR *pointer); */ 237/** UCHAR *_tx_misra_entry_to_uchar_pointer_convert(TX_TRACE_BUFFER_ENTRY *pointer); */ 238/** UCHAR *_tx_misra_char_to_uchar_pointer_convert(CHAR *pointer); */ 239/** VOID _tx_misra_event_flags_group_not_used(TX_EVENT_FLAGS_GROUP *group_ptr); */ 240/** VOID _tx_misra_event_flags_set_notify_not_used(VOID (*events_set_notify)(TX_EVENT_FLAGS_GROUP *notify_group_ptr)); */ 241/** VOID _tx_misra_queue_not_used(TX_QUEUE *queue_ptr); */ 242/** VOID _tx_misra_queue_send_notify_not_used(VOID (*queue_send_notify)(TX_QUEUE *notify_queue_ptr)); */ 243/** VOID _tx_misra_semaphore_not_used(TX_SEMAPHORE *semaphore_ptr); */ 244/** VOID _tx_misra_semaphore_put_notify_not_used(VOID (*semaphore_put_notify)(TX_SEMAPHORE *notify_semaphore_ptr)); */ 245/** VOID _tx_misra_thread_not_used(TX_THREAD *thread_ptr); */ 246/** VOID _tx_misra_thread_entry_exit_notify_not_used(VOID (*thread_entry_exit_notify)(TX_THREAD *notify_thread_ptr, UINT id)); */ 247/** */ 248/************************************************************************************************************************************/ 249/************************************************************************************************************************************/ 250 SECTION `.text`:CODE:NOROOT(1) 251 THUMB 252_tx_misra_pointer_to_ulong_convert: 253_tx_misra_ulong_to_pointer_convert: 254_tx_misra_indirect_void_to_uchar_pointer_convert: 255_tx_misra_uchar_to_indirect_uchar_pointer_convert: 256_tx_misra_block_pool_to_uchar_pointer_convert: 257_tx_misra_void_to_block_pool_pointer_convert: 258_tx_misra_void_to_uchar_pointer_convert: 259_tx_misra_uchar_to_block_pool_pointer_convert: 260_tx_misra_void_to_indirect_uchar_pointer_convert: 261_tx_misra_void_to_byte_pool_pointer_convert: 262_tx_misra_byte_pool_to_uchar_pointer_convert: 263_tx_misra_uchar_to_align_type_pointer_convert: 264_tx_misra_uchar_to_indirect_byte_pool_pointer_convert: 265_tx_misra_void_to_event_flags_pointer_convert: 266_tx_misra_void_to_ulong_pointer_convert: 267_tx_misra_void_to_mutex_pointer_convert: 268_tx_misra_void_to_queue_pointer_convert: 269_tx_misra_void_to_semaphore_pointer_convert: 270_tx_misra_uchar_to_void_pointer_convert: 271_tx_misra_ulong_to_thread_pointer_convert: 272_tx_misra_timer_indirect_to_void_pointer_convert: 273_tx_misra_const_char_to_char_pointer_convert: 274_tx_misra_void_to_thread_pointer_convert: 275#ifdef TX_ENABLE_EVENT_TRACE 276_tx_misra_object_to_uchar_pointer_convert: 277_tx_misra_uchar_to_object_pointer_convert: 278_tx_misra_uchar_to_header_pointer_convert: 279_tx_misra_uchar_to_entry_pointer_convert: 280_tx_misra_entry_to_uchar_pointer_convert: 281#endif 282_tx_misra_char_to_uchar_pointer_convert: 283_tx_misra_event_flags_group_not_used: 284_tx_misra_event_flags_set_notify_not_used: 285_tx_misra_queue_not_used: 286_tx_misra_queue_send_notify_not_used: 287_tx_misra_semaphore_not_used: 288_tx_misra_semaphore_put_notify_not_used: 289_tx_misra_thread_entry_exit_notify_not_used: 290_tx_misra_thread_not_used: 291 292 BX LR // return 293 294 295/**************************************************************************/ 296/**************************************************************************/ 297/** */ 298/** ULONG *_tx_misra_ulong_pointer_add(ULONG *ptr, ULONG amount); */ 299/** */ 300/**************************************************************************/ 301/**************************************************************************/ 302 303 SECTION `.text`:CODE:NOROOT(1) 304 THUMB 305_tx_misra_ulong_pointer_add: 306 ADD R0,R0,R1, LSL #+2 307 BX LR // return 308 309 310/**************************************************************************/ 311/**************************************************************************/ 312/** */ 313/** ULONG *_tx_misra_ulong_pointer_sub(ULONG *ptr, ULONG amount); */ 314/** */ 315/**************************************************************************/ 316/**************************************************************************/ 317 318 SECTION `.text`:CODE:NOROOT(1) 319 THUMB 320_tx_misra_ulong_pointer_sub: 321 MVNS R2,#+3 322 MULS R1,R2,R1 323 ADD R0,R0,R1 324 BX LR // return 325 326 327/**************************************************************************/ 328/**************************************************************************/ 329/** */ 330/** ULONG _tx_misra_ulong_pointer_dif(ULONG *ptr1, ULONG *ptr2); */ 331/** */ 332/**************************************************************************/ 333/**************************************************************************/ 334 335 SECTION `.text`:CODE:NOROOT(1) 336 THUMB 337_tx_misra_ulong_pointer_dif: 338 SUBS R0,R0,R1 339 ASRS R0,R0,#+2 340 BX LR // return 341 342 343/**************************************************************************/ 344/**************************************************************************/ 345/** */ 346/** VOID _tx_misra_message_copy(ULONG **source, ULONG **destination, */ 347/** UINT size); */ 348/** */ 349/**************************************************************************/ 350/**************************************************************************/ 351 352 SECTION `.text`:CODE:NOROOT(1) 353 THUMB 354_tx_misra_message_copy: 355 PUSH {R4,R5} 356 LDR R3,[R0, #+0] 357 LDR R4,[R1, #+0] 358 LDR R5,[R3, #+0] 359 STR R5,[R4, #+0] 360 ADDS R4,R4,#+4 361 ADDS R3,R3,#+4 362 CMP R2,#+2 363 BCC.N ??_tx_misra_message_copy_0 364 SUBS R2,R2,#+1 365 B.N ??_tx_misra_message_copy_1 366??_tx_misra_message_copy_2: 367 LDR R5,[R3, #+0] 368 STR R5,[R4, #+0] 369 ADDS R4,R4,#+4 370 ADDS R3,R3,#+4 371 SUBS R2,R2,#+1 372??_tx_misra_message_copy_1: 373 CMP R2,#+0 374 BNE.N ??_tx_misra_message_copy_2 375??_tx_misra_message_copy_0: 376 STR R3,[R0, #+0] 377 STR R4,[R1, #+0] 378 POP {R4,R5} 379 BX LR // return 380 381 382/**************************************************************************/ 383/**************************************************************************/ 384/** */ 385/** ULONG _tx_misra_timer_pointer_dif(TX_TIMER_INTERNAL **ptr1, */ 386/** TX_TIMER_INTERNAL **ptr2); */ 387/** */ 388/**************************************************************************/ 389/**************************************************************************/ 390 391 SECTION `.text`:CODE:NOROOT(1) 392 THUMB 393_tx_misra_timer_pointer_dif: 394 SUBS R0,R0,R1 395 ASRS R0,R0,#+2 396 BX LR // return 397 398 399/**************************************************************************/ 400/**************************************************************************/ 401/** */ 402/** TX_TIMER_INTERNAL **_tx_misra_timer_pointer_add(TX_TIMER_INTERNAL */ 403/** **ptr1, ULONG size); */ 404/** */ 405/**************************************************************************/ 406/**************************************************************************/ 407 408 SECTION `.text`:CODE:NOROOT(1) 409 THUMB 410_tx_misra_timer_pointer_add: 411 ADD R0,R0,R1, LSL #+2 412 BX LR // return 413 414 415/**************************************************************************/ 416/**************************************************************************/ 417/** */ 418/** VOID _tx_misra_user_timer_pointer_get(TX_TIMER_INTERNAL */ 419/** *internal_timer, TX_TIMER **user_timer); */ 420/** */ 421/**************************************************************************/ 422/**************************************************************************/ 423 424 SECTION `.text`:CODE:NOROOT(1) 425 THUMB 426_tx_misra_user_timer_pointer_get: 427 SUBS R0,#8 428 STR R0,[R1, #+0] 429 BX LR // return 430 431 432/**************************************************************************/ 433/**************************************************************************/ 434/** */ 435/** VOID _tx_misra_thread_stack_check(TX_THREAD *thread_ptr, */ 436/** VOID **highest_stack); */ 437/** */ 438/**************************************************************************/ 439/**************************************************************************/ 440 441 SECTION `.text`:CODE:NOROOT(1) 442 THUMB 443_tx_misra_thread_stack_check: 444 PUSH {R3-R5,LR} 445 MOVS R4,R0 446 MOVS R5,R1 447 BL _tx_thread_interrupt_disable 448 CMP R4,#+0 449 BEQ.N ??_tx_misra_thread_stack_check_0 450 LDR R1,[R4, #+0] 451 LDR.N R2,??DataTable2 // 0x54485244 452 CMP R1,R2 453 BNE.N ??_tx_misra_thread_stack_check_0 454 LDR R1,[R4, #+8] 455 LDR R2,[R5, #+0] 456 CMP R1,R2 457 BCS.N ??_tx_misra_thread_stack_check_1 458 LDR R1,[R4, #+8] 459 STR R1,[R5, #+0] 460??_tx_misra_thread_stack_check_1: 461 LDR R1,[R4, #+12] 462 LDR R1,[R1, #+0] 463 CMP R1,#-269488145 464 BNE.N ??_tx_misra_thread_stack_check_2 465 LDR R1,[R4, #+16] 466 LDR R1,[R1, #+1] 467 CMP R1,#-269488145 468 BNE.N ??_tx_misra_thread_stack_check_2 469 LDR R1,[R5, #+0] 470 LDR R2,[R4, #+12] 471 CMP R1,R2 472 BCS.N ??_tx_misra_thread_stack_check_3 473??_tx_misra_thread_stack_check_2: 474 BL _tx_thread_interrupt_restore 475 MOVS R0,R4 476 BL _tx_thread_stack_error_handler 477 BL _tx_thread_interrupt_disable 478??_tx_misra_thread_stack_check_3: 479 LDR R1,[R5, #+0] 480 LDR R1,[R1, #-4] 481 CMP R1,#-269488145 482 BEQ.N ??_tx_misra_thread_stack_check_0 483 BL _tx_thread_interrupt_restore 484 MOVS R0,R4 485 BL _tx_thread_stack_analyze 486 BL _tx_thread_interrupt_disable 487??_tx_misra_thread_stack_check_0: 488 BL _tx_thread_interrupt_restore 489 POP {R0,R4,R5,PC} // return 490 491#ifdef TX_ENABLE_EVENT_TRACE 492 493/**************************************************************************/ 494/**************************************************************************/ 495/** */ 496/** VOID _tx_misra_trace_event_insert(ULONG event_id, */ 497/** VOID *info_field_1, ULONG info_field_2, ULONG info_field_3, */ 498/** ULONG info_field_4, ULONG filter, ULONG time_stamp); */ 499/** */ 500/**************************************************************************/ 501/**************************************************************************/ 502 503 SECTION `.text`:CODE:NOROOT(1) 504 THUMB 505_tx_misra_trace_event_insert: 506 PUSH {R3-R7,LR} 507 LDR.N R4,??DataTable2_1 508 LDR R4,[R4, #+0] 509 CMP R4,#+0 510 BEQ.N ??_tx_misra_trace_event_insert_0 511 LDR.N R5,??DataTable2_2 512 LDR R5,[R5, #+0] 513 LDR R6,[SP, #+28] 514 TST R5,R6 515 BEQ.N ??_tx_misra_trace_event_insert_0 516 LDR.N R5,??DataTable2_3 517 LDR R5,[R5, #+0] 518 LDR.N R6,??DataTable2_4 519 LDR R6,[R6, #+0] 520 CMP R5,#+0 521 BNE.N ??_tx_misra_trace_event_insert_1 522 LDR R5,[R6, #+44] 523 LDR R7,[R6, #+60] 524 LSLS R7,R7,#+16 525 ORRS R7,R7,#0x80000000 526 ORRS R5,R7,R5 527 B.N ??_tx_misra_trace_event_insert_2 528??_tx_misra_trace_event_insert_1: 529 CMP R5,#-252645136 530 BCS.N ??_tx_misra_trace_event_insert_3 531 MOVS R5,R6 532 MOVS R6,#-1 533 B.N ??_tx_misra_trace_event_insert_2 534??_tx_misra_trace_event_insert_3: 535 MOVS R6,#-252645136 536 MOVS R5,#+0 537??_tx_misra_trace_event_insert_2: 538 STR R6,[R4, #+0] 539 STR R5,[R4, #+4] 540 STR R0,[R4, #+8] 541 LDR R0,[SP, #+32] 542 STR R0,[R4, #+12] 543 STR R1,[R4, #+16] 544 STR R2,[R4, #+20] 545 STR R3,[R4, #+24] 546 LDR R0,[SP, #+24] 547 STR R0,[R4, #+28] 548 ADDS R4,R4,#+32 549 LDR.N R0,??DataTable2_5 550 LDR R0,[R0, #+0] 551 CMP R4,R0 552 BCC.N ??_tx_misra_trace_event_insert_4 553 LDR.N R0,??DataTable2_6 554 LDR R4,[R0, #+0] 555 LDR.N R0,??DataTable2_1 556 STR R4,[R0, #+0] 557 LDR.N R0,??DataTable2_7 558 LDR R0,[R0, #+0] 559 STR R4,[R0, #+32] 560 LDR.N R0,??DataTable2_8 561 LDR R0,[R0, #+0] 562 CMP R0,#+0 563 BEQ.N ??_tx_misra_trace_event_insert_0 564 LDR.N R0,??DataTable2_7 565 LDR R0,[R0, #+0] 566 LDR.N R1,??DataTable2_8 567 LDR R1,[R1, #+0] 568 BLX R1 569 B.N ??_tx_misra_trace_event_insert_0 570??_tx_misra_trace_event_insert_4: 571 LDR.N R0,??DataTable2_1 572 STR R4,[R0, #+0] 573 LDR.N R0,??DataTable2_7 574 LDR R0,[R0, #+0] 575 STR R4,[R0, #+32] 576??_tx_misra_trace_event_insert_0: 577 POP {R0,R4-R7,PC} // return 578 579 580 SECTION `.text`:CODE:NOROOT(2) 581 SECTION_TYPE SHT_PROGBITS, 0 582 DATA 583??DataTable2_1: 584 DC32 _tx_trace_buffer_current_ptr 585 586 SECTION `.text`:CODE:NOROOT(2) 587 SECTION_TYPE SHT_PROGBITS, 0 588 DATA 589??DataTable2_2: 590 DC32 _tx_trace_event_enable_bits 591 592 SECTION `.text`:CODE:NOROOT(2) 593 SECTION_TYPE SHT_PROGBITS, 0 594 DATA 595??DataTable2_5: 596 DC32 _tx_trace_buffer_end_ptr 597 598 SECTION `.text`:CODE:NOROOT(2) 599 SECTION_TYPE SHT_PROGBITS, 0 600 DATA 601??DataTable2_6: 602 DC32 _tx_trace_buffer_start_ptr 603 604 SECTION `.text`:CODE:NOROOT(2) 605 SECTION_TYPE SHT_PROGBITS, 0 606 DATA 607??DataTable2_7: 608 DC32 _tx_trace_header_ptr 609 610 SECTION `.text`:CODE:NOROOT(2) 611 SECTION_TYPE SHT_PROGBITS, 0 612 DATA 613??DataTable2_8: 614 DC32 _tx_trace_full_notify_function 615 616 617/**************************************************************************/ 618/**************************************************************************/ 619/** */ 620/** ULONG _tx_misra_time_stamp_get(VOID); */ 621/** */ 622/**************************************************************************/ 623/**************************************************************************/ 624 625 SECTION `.text`:CODE:NOROOT(1) 626 THUMB 627_tx_misra_time_stamp_get: 628 MOVS R0,#+0 629 BX LR // return 630 631#endif 632 633 SECTION `.text`:CODE:NOROOT(2) 634 SECTION_TYPE SHT_PROGBITS, 0 635 DATA 636??DataTable2: 637 DC32 0x54485244 638 639 SECTION `.text`:CODE:NOROOT(2) 640 SECTION_TYPE SHT_PROGBITS, 0 641 DATA 642??DataTable2_3: 643 DC32 _tx_thread_system_state 644 645 SECTION `.text`:CODE:NOROOT(2) 646 SECTION_TYPE SHT_PROGBITS, 0 647 DATA 648??DataTable2_4: 649 DC32 _tx_thread_current_ptr 650 651 652/**************************************************************************/ 653/**************************************************************************/ 654/** */ 655/** UINT _tx_misra_always_true(void); */ 656/** */ 657/**************************************************************************/ 658/**************************************************************************/ 659 660 SECTION `.text`:CODE:NOROOT(1) 661 THUMB 662_tx_misra_always_true: 663 MOVS R0,#+1 664 BX LR // return 665 666 667/**************************************************************************/ 668/**************************************************************************/ 669/** */ 670/** UINT _tx_misra_status_get(UINT status); */ 671/** */ 672/**************************************************************************/ 673/**************************************************************************/ 674 675 SECTION `.text`:CODE:NOROOT(1) 676 THUMB 677_tx_misra_status_get: 678 MOVS R0,#+0 679 BX LR // return 680 681 682/***********************************************************************************************/ 683/***********************************************************************************************/ 684/** */ 685/** ULONG _tx_misra_ipsr_get(void); */ 686/** */ 687/***********************************************************************************************/ 688/***********************************************************************************************/ 689 690 SECTION `.text`:CODE:NOROOT(1) 691 THUMB 692_tx_misra_ipsr_get: 693 MRS R0, IPSR 694 BX LR // return 695 696 697/***********************************************************************************************/ 698/***********************************************************************************************/ 699/** */ 700/** ULONG _tx_misra_control_get(void); */ 701/** */ 702/***********************************************************************************************/ 703/***********************************************************************************************/ 704 705 SECTION `.text`:CODE:NOROOT(1) 706 THUMB 707_tx_misra_control_get: 708 MRS R0, CONTROL 709 BX LR // return 710 711 712/***********************************************************************************************/ 713/***********************************************************************************************/ 714/** */ 715/** void _tx_misra_control_set(ULONG value); */ 716/** */ 717/***********************************************************************************************/ 718/***********************************************************************************************/ 719 720 SECTION `.text`:CODE:NOROOT(1) 721 THUMB 722_tx_misra_control_set: 723 MSR CONTROL, R0 724 BX LR // return 725 726 727#ifdef __ARMVFP__ 728 729/***********************************************************************************************/ 730/***********************************************************************************************/ 731/** */ 732/** ULONG _tx_misra_fpccr_get(void); */ 733/** */ 734/***********************************************************************************************/ 735/***********************************************************************************************/ 736 737 SECTION `.text`:CODE:NOROOT(2) 738 THUMB 739_tx_misra_fpccr_get: 740 LDR r0, =0xE000EF34 // Build FPCCR address 741 LDR r0, [r0] // Load FPCCR value 742 BX LR // return 743 744 745/***********************************************************************************************/ 746/***********************************************************************************************/ 747/** */ 748/** void _tx_misra_vfp_touch(void); */ 749/** */ 750/***********************************************************************************************/ 751/***********************************************************************************************/ 752 753 SECTION `.text`:CODE:NOROOT(1) 754 THUMB 755_tx_misra_vfp_touch: 756 vmov.f32 s0, s0 757 BX LR // return 758 759#endif 760 761 762 SECTION `.iar_vfe_header`:DATA:NOALLOC:NOROOT(2) 763 SECTION_TYPE SHT_PROGBITS, 0 764 DATA 765 DC32 0 766 767 END 768
