1/**************************************************************************/ 2/* */ 3/* Copyright (c) Microsoft Corporation. All rights reserved. */ 4/* */ 5/* This software is licensed under the Microsoft Software License */ 6/* Terms for Microsoft Azure RTOS. Full text of the license can be */ 7/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ 8/* and in the root directory of this software. */ 9/* */ 10/**************************************************************************/ 11 12 13/**************************************************************************/ 14/**************************************************************************/ 15/** */ 16/** ThreadX Component */ 17/** */ 18/** ThreadX MISRA Compliance */ 19/** */ 20/**************************************************************************/ 21/**************************************************************************/ 22 23 #define SHT_PROGBITS 0x1 24 25 EXTERN __aeabi_memset 26 EXTERN _tx_thread_current_ptr 27 EXTERN _tx_thread_interrupt_disable 28 EXTERN _tx_thread_interrupt_restore 29 EXTERN _tx_thread_stack_analyze 30 EXTERN _tx_thread_stack_error_handler 31 EXTERN _tx_thread_system_state 32#ifdef TX_ENABLE_EVENT_TRACE 33 EXTERN _tx_trace_buffer_current_ptr 34 EXTERN _tx_trace_buffer_end_ptr 35 EXTERN _tx_trace_buffer_start_ptr 36 EXTERN _tx_trace_event_enable_bits 37 EXTERN _tx_trace_full_notify_function 38 EXTERN _tx_trace_header_ptr 39#endif 40 41 PUBLIC _tx_misra_always_true 42 PUBLIC _tx_misra_block_pool_to_uchar_pointer_convert 43 PUBLIC _tx_misra_byte_pool_to_uchar_pointer_convert 44 PUBLIC _tx_misra_char_to_uchar_pointer_convert 45 PUBLIC _tx_misra_const_char_to_char_pointer_convert 46#ifdef TX_ENABLE_EVENT_TRACE 47 PUBLIC _tx_misra_entry_to_uchar_pointer_convert 48#endif 49 PUBLIC _tx_misra_indirect_void_to_uchar_pointer_convert 50 PUBLIC _tx_misra_memset 51 PUBLIC _tx_misra_message_copy 52#ifdef TX_ENABLE_EVENT_TRACE 53 PUBLIC _tx_misra_object_to_uchar_pointer_convert 54#endif 55 PUBLIC _tx_misra_pointer_to_ulong_convert 56 PUBLIC _tx_misra_status_get 57 PUBLIC _tx_misra_thread_stack_check 58#ifdef TX_ENABLE_EVENT_TRACE 59 PUBLIC _tx_misra_time_stamp_get 60#endif 61 PUBLIC _tx_misra_timer_indirect_to_void_pointer_convert 62 PUBLIC _tx_misra_timer_pointer_add 63 PUBLIC _tx_misra_timer_pointer_dif 64#ifdef TX_ENABLE_EVENT_TRACE 65 PUBLIC _tx_misra_trace_event_insert 66#endif 67 PUBLIC _tx_misra_uchar_pointer_add 68 PUBLIC _tx_misra_uchar_pointer_dif 69 PUBLIC _tx_misra_uchar_pointer_sub 70 PUBLIC _tx_misra_uchar_to_align_type_pointer_convert 71 PUBLIC _tx_misra_uchar_to_block_pool_pointer_convert 72#ifdef TX_ENABLE_EVENT_TRACE 73 PUBLIC _tx_misra_uchar_to_entry_pointer_convert 74 PUBLIC _tx_misra_uchar_to_header_pointer_convert 75#endif 76 PUBLIC _tx_misra_uchar_to_indirect_byte_pool_pointer_convert 77 PUBLIC _tx_misra_uchar_to_indirect_uchar_pointer_convert 78#ifdef TX_ENABLE_EVENT_TRACE 79 PUBLIC _tx_misra_uchar_to_object_pointer_convert 80#endif 81 PUBLIC _tx_misra_uchar_to_void_pointer_convert 82 PUBLIC _tx_misra_ulong_pointer_add 83 PUBLIC _tx_misra_ulong_pointer_dif 84 PUBLIC _tx_misra_ulong_pointer_sub 85 PUBLIC _tx_misra_ulong_to_pointer_convert 86 PUBLIC _tx_misra_ulong_to_thread_pointer_convert 87 PUBLIC _tx_misra_user_timer_pointer_get 88 PUBLIC _tx_misra_void_to_block_pool_pointer_convert 89 PUBLIC _tx_misra_void_to_byte_pool_pointer_convert 90 PUBLIC _tx_misra_void_to_event_flags_pointer_convert 91 PUBLIC _tx_misra_void_to_indirect_uchar_pointer_convert 92 PUBLIC _tx_misra_void_to_mutex_pointer_convert 93 PUBLIC _tx_misra_void_to_queue_pointer_convert 94 PUBLIC _tx_misra_void_to_semaphore_pointer_convert 95 PUBLIC _tx_misra_void_to_thread_pointer_convert 96 PUBLIC _tx_misra_void_to_uchar_pointer_convert 97 PUBLIC _tx_misra_void_to_ulong_pointer_convert 98 PUBLIC _tx_misra_ipsr_get 99 PUBLIC _tx_misra_control_get 100 PUBLIC _tx_misra_control_set 101#ifdef __ARMVFP__ 102 PUBLIC _tx_misra_fpccr_get 103 PUBLIC _tx_misra_vfp_touch 104#endif 105 106 PUBLIC _tx_misra_event_flags_group_not_used 107 PUBLIC _tx_misra_event_flags_set_notify_not_used 108 PUBLIC _tx_misra_queue_not_used 109 PUBLIC _tx_misra_queue_send_notify_not_used 110 PUBLIC _tx_misra_semaphore_not_used 111 PUBLIC _tx_misra_semaphore_put_notify_not_used 112 PUBLIC _tx_misra_thread_entry_exit_notify_not_used 113 PUBLIC _tx_misra_thread_not_used 114 115#ifdef TX_MISRA_ENABLE 116 PUBLIC _tx_version_id 117 118 SECTION `.data`:DATA:REORDER:NOROOT(2) 119 DATA 120// 51 CHAR _tx_version_id[100] = "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX 6.1 MISRA C Compliant *"; 121_tx_version_id: 122 DC8 43H, 6FH, 70H, 79H, 72H, 69H, 67H, 68H 123 DC8 74H, 20H, 28H, 63H, 29H, 20H, 31H, 39H 124 DC8 39H, 36H, 2DH, 32H, 30H, 31H, 38H, 20H 125 DC8 45H, 78H, 70H, 72H, 65H, 73H, 73H, 20H 126 DC8 4CH, 6FH, 67H, 69H, 63H, 20H, 49H, 6EH 127 DC8 63H, 2EH, 20H, 2AH, 20H, 54H, 68H, 72H 128 DC8 65H, 61H, 64H, 58H, 20H, 36H, 2EH, 31H 129 DC8 20H, 4DH, 49H, 53H, 52H, 41H, 20H, 43H 130 DC8 20H, 43H, 6FH, 6DH, 70H, 6CH, 69H, 61H 131 DC8 6EH, 74H, 20H, 2AH, 0 132 DC8 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 133#endif //TX_MISRA_ENABLE 134 135/**************************************************************************/ 136/**************************************************************************/ 137/** */ 138/** VOID _tx_misra_memset(VOID *ptr, UINT value, UINT size); */ 139/** */ 140/**************************************************************************/ 141/**************************************************************************/ 142 143 SECTION `.text`:CODE:NOROOT(1) 144 THUMB 145_tx_misra_memset: 146 PUSH {R4,LR} 147 MOVS R4,R0 148 MOVS R0,R2 149 MOVS R2,R1 150 MOVS R1,R0 151 MOVS R0,R4 152 BL __aeabi_memset 153 POP {R4,PC} // return 154 155/**************************************************************************/ 156/**************************************************************************/ 157/** */ 158/** UCHAR *_tx_misra_uchar_pointer_add(UCHAR *ptr, ULONG amount); */ 159/** */ 160/**************************************************************************/ 161/**************************************************************************/ 162 163 SECTION `.text`:CODE:NOROOT(1) 164 THUMB 165_tx_misra_uchar_pointer_add: 166 ADD R0,R0,R1 167 BX LR // return 168 169 170/**************************************************************************/ 171/**************************************************************************/ 172/** */ 173/** UCHAR *_tx_misra_uchar_pointer_sub(UCHAR *ptr, ULONG amount); */ 174/** */ 175/**************************************************************************/ 176/**************************************************************************/ 177 178 SECTION `.text`:CODE:NOROOT(1) 179 THUMB 180_tx_misra_uchar_pointer_sub: 181 RSBS R1,R1,#+0 182 ADD R0,R0,R1 183 BX LR // return 184 185 186/**************************************************************************/ 187/**************************************************************************/ 188/** */ 189/** ULONG _tx_misra_uchar_pointer_dif(UCHAR *ptr1, UCHAR *ptr2); */ 190/** */ 191/**************************************************************************/ 192/**************************************************************************/ 193 194 SECTION `.text`:CODE:NOROOT(1) 195 THUMB 196_tx_misra_uchar_pointer_dif: 197 SUBS R0,R0,R1 198 BX LR // return 199 200 201/************************************************************************************************************************************/ 202/************************************************************************************************************************************/ 203/** */ 204/** This single function serves all of the below prototypes. */ 205/** */ 206/** ULONG _tx_misra_pointer_to_ulong_convert(VOID *ptr); */ 207/** VOID *_tx_misra_ulong_to_pointer_convert(ULONG input); */ 208/** UCHAR **_tx_misra_indirect_void_to_uchar_pointer_convert(VOID **return_ptr); */ 209/** UCHAR **_tx_misra_uchar_to_indirect_uchar_pointer_convert(UCHAR *pointer); */ 210/** UCHAR *_tx_misra_block_pool_to_uchar_pointer_convert(TX_BLOCK_POOL *pool); */ 211/** TX_BLOCK_POOL *_tx_misra_void_to_block_pool_pointer_convert(VOID *pointer); */ 212/** UCHAR *_tx_misra_void_to_uchar_pointer_convert(VOID *pointer); */ 213/** TX_BLOCK_POOL *_tx_misra_uchar_to_block_pool_pointer_convert(UCHAR *pointer); */ 214/** UCHAR **_tx_misra_void_to_indirect_uchar_pointer_convert(VOID *pointer); */ 215/** TX_BYTE_POOL *_tx_misra_void_to_byte_pool_pointer_convert(VOID *pointer); */ 216/** UCHAR *_tx_misra_byte_pool_to_uchar_pointer_convert(TX_BYTE_POOL *pool); */ 217/** ALIGN_TYPE *_tx_misra_uchar_to_align_type_pointer_convert(UCHAR *pointer); */ 218/** TX_BYTE_POOL **_tx_misra_uchar_to_indirect_byte_pool_pointer_convert(UCHAR *pointer); */ 219/** TX_EVENT_FLAGS_GROUP *_tx_misra_void_to_event_flags_pointer_convert(VOID *pointer); */ 220/** ULONG *_tx_misra_void_to_ulong_pointer_convert(VOID *pointer); */ 221/** TX_MUTEX *_tx_misra_void_to_mutex_pointer_convert(VOID *pointer); */ 222/** TX_QUEUE *_tx_misra_void_to_queue_pointer_convert(VOID *pointer); */ 223/** TX_SEMAPHORE *_tx_misra_void_to_semaphore_pointer_convert(VOID *pointer); */ 224/** VOID *_tx_misra_uchar_to_void_pointer_convert(UCHAR *pointer); */ 225/** TX_THREAD *_tx_misra_ulong_to_thread_pointer_convert(ULONG value); */ 226/** VOID *_tx_misra_timer_indirect_to_void_pointer_convert(TX_TIMER_INTERNAL **pointer); */ 227/** CHAR *_tx_misra_const_char_to_char_pointer_convert(const char *pointer); */ 228/** TX_THREAD *_tx_misra_void_to_thread_pointer_convert(void *pointer); */ 229/** UCHAR *_tx_misra_object_to_uchar_pointer_convert(TX_TRACE_OBJECT_ENTRY *pointer); */ 230/** TX_TRACE_OBJECT_ENTRY *_tx_misra_uchar_to_object_pointer_convert(UCHAR *pointer); */ 231/** TX_TRACE_HEADER *_tx_misra_uchar_to_header_pointer_convert(UCHAR *pointer); */ 232/** TX_TRACE_BUFFER_ENTRY *_tx_misra_uchar_to_entry_pointer_convert(UCHAR *pointer); */ 233/** UCHAR *_tx_misra_entry_to_uchar_pointer_convert(TX_TRACE_BUFFER_ENTRY *pointer); */ 234/** UCHAR *_tx_misra_char_to_uchar_pointer_convert(CHAR *pointer); */ 235/** VOID _tx_misra_event_flags_group_not_used(TX_EVENT_FLAGS_GROUP *group_ptr); */ 236/** VOID _tx_misra_event_flags_set_notify_not_used(VOID (*events_set_notify)(TX_EVENT_FLAGS_GROUP *notify_group_ptr)); */ 237/** VOID _tx_misra_queue_not_used(TX_QUEUE *queue_ptr); */ 238/** VOID _tx_misra_queue_send_notify_not_used(VOID (*queue_send_notify)(TX_QUEUE *notify_queue_ptr)); */ 239/** VOID _tx_misra_semaphore_not_used(TX_SEMAPHORE *semaphore_ptr); */ 240/** VOID _tx_misra_semaphore_put_notify_not_used(VOID (*semaphore_put_notify)(TX_SEMAPHORE *notify_semaphore_ptr)); */ 241/** VOID _tx_misra_thread_not_used(TX_THREAD *thread_ptr); */ 242/** VOID _tx_misra_thread_entry_exit_notify_not_used(VOID (*thread_entry_exit_notify)(TX_THREAD *notify_thread_ptr, UINT id)); */ 243/** */ 244/************************************************************************************************************************************/ 245/************************************************************************************************************************************/ 246 SECTION `.text`:CODE:NOROOT(1) 247 THUMB 248_tx_misra_pointer_to_ulong_convert: 249_tx_misra_ulong_to_pointer_convert: 250_tx_misra_indirect_void_to_uchar_pointer_convert: 251_tx_misra_uchar_to_indirect_uchar_pointer_convert: 252_tx_misra_block_pool_to_uchar_pointer_convert: 253_tx_misra_void_to_block_pool_pointer_convert: 254_tx_misra_void_to_uchar_pointer_convert: 255_tx_misra_uchar_to_block_pool_pointer_convert: 256_tx_misra_void_to_indirect_uchar_pointer_convert: 257_tx_misra_void_to_byte_pool_pointer_convert: 258_tx_misra_byte_pool_to_uchar_pointer_convert: 259_tx_misra_uchar_to_align_type_pointer_convert: 260_tx_misra_uchar_to_indirect_byte_pool_pointer_convert: 261_tx_misra_void_to_event_flags_pointer_convert: 262_tx_misra_void_to_ulong_pointer_convert: 263_tx_misra_void_to_mutex_pointer_convert: 264_tx_misra_void_to_queue_pointer_convert: 265_tx_misra_void_to_semaphore_pointer_convert: 266_tx_misra_uchar_to_void_pointer_convert: 267_tx_misra_ulong_to_thread_pointer_convert: 268_tx_misra_timer_indirect_to_void_pointer_convert: 269_tx_misra_const_char_to_char_pointer_convert: 270_tx_misra_void_to_thread_pointer_convert: 271#ifdef TX_ENABLE_EVENT_TRACE 272_tx_misra_object_to_uchar_pointer_convert: 273_tx_misra_uchar_to_object_pointer_convert: 274_tx_misra_uchar_to_header_pointer_convert: 275_tx_misra_uchar_to_entry_pointer_convert: 276_tx_misra_entry_to_uchar_pointer_convert: 277#endif 278_tx_misra_char_to_uchar_pointer_convert: 279_tx_misra_event_flags_group_not_used: 280_tx_misra_event_flags_set_notify_not_used: 281_tx_misra_queue_not_used: 282_tx_misra_queue_send_notify_not_used: 283_tx_misra_semaphore_not_used: 284_tx_misra_semaphore_put_notify_not_used: 285_tx_misra_thread_entry_exit_notify_not_used: 286_tx_misra_thread_not_used: 287 288 BX LR // return 289 290 291/**************************************************************************/ 292/**************************************************************************/ 293/** */ 294/** ULONG *_tx_misra_ulong_pointer_add(ULONG *ptr, ULONG amount); */ 295/** */ 296/**************************************************************************/ 297/**************************************************************************/ 298 299 SECTION `.text`:CODE:NOROOT(1) 300 THUMB 301_tx_misra_ulong_pointer_add: 302 LSLS R1,#2 303 ADD R0,R0,R1 304 BX LR // return 305 306 307/**************************************************************************/ 308/**************************************************************************/ 309/** */ 310/** ULONG *_tx_misra_ulong_pointer_sub(ULONG *ptr, ULONG amount); */ 311/** */ 312/**************************************************************************/ 313/**************************************************************************/ 314 315 SECTION `.text`:CODE:NOROOT(1) 316 THUMB 317_tx_misra_ulong_pointer_sub: 318 MOVS R3,#3 319 MVNS R2,R3 320 MULS R1,R2,R1 321 ADD R0,R0,R1 322 BX LR // return 323 324 325/**************************************************************************/ 326/**************************************************************************/ 327/** */ 328/** ULONG _tx_misra_ulong_pointer_dif(ULONG *ptr1, ULONG *ptr2); */ 329/** */ 330/**************************************************************************/ 331/**************************************************************************/ 332 333 SECTION `.text`:CODE:NOROOT(1) 334 THUMB 335_tx_misra_ulong_pointer_dif: 336 SUBS R0,R0,R1 337 ASRS R0,R0,#+2 338 BX LR // return 339 340 341/**************************************************************************/ 342/**************************************************************************/ 343/** */ 344/** VOID _tx_misra_message_copy(ULONG **source, ULONG **destination, */ 345/** UINT size); */ 346/** */ 347/**************************************************************************/ 348/**************************************************************************/ 349 350 SECTION `.text`:CODE:NOROOT(1) 351 THUMB 352_tx_misra_message_copy: 353 PUSH {R4,R5} 354 LDR R3,[R0, #+0] 355 LDR R4,[R1, #+0] 356 LDR R5,[R3, #+0] 357 STR R5,[R4, #+0] 358 ADDS R4,R4,#+4 359 ADDS R3,R3,#+4 360 CMP R2,#+2 361 BCC.N ??_tx_misra_message_copy_0 362 SUBS R2,R2,#+1 363 B.N ??_tx_misra_message_copy_1 364??_tx_misra_message_copy_2: 365 LDR R5,[R3, #+0] 366 STR R5,[R4, #+0] 367 ADDS R4,R4,#+4 368 ADDS R3,R3,#+4 369 SUBS R2,R2,#+1 370??_tx_misra_message_copy_1: 371 CMP R2,#+0 372 BNE.N ??_tx_misra_message_copy_2 373??_tx_misra_message_copy_0: 374 STR R3,[R0, #+0] 375 STR R4,[R1, #+0] 376 POP {R4,R5} 377 BX LR // return 378 379 380/**************************************************************************/ 381/**************************************************************************/ 382/** */ 383/** ULONG _tx_misra_timer_pointer_dif(TX_TIMER_INTERNAL **ptr1, */ 384/** TX_TIMER_INTERNAL **ptr2); */ 385/** */ 386/**************************************************************************/ 387/**************************************************************************/ 388 389 SECTION `.text`:CODE:NOROOT(1) 390 THUMB 391_tx_misra_timer_pointer_dif: 392 SUBS R0,R0,R1 393 ASRS R0,R0,#+2 394 BX LR // return 395 396 397/**************************************************************************/ 398/**************************************************************************/ 399/** */ 400/** TX_TIMER_INTERNAL **_tx_misra_timer_pointer_add(TX_TIMER_INTERNAL */ 401/** **ptr1, ULONG size); */ 402/** */ 403/**************************************************************************/ 404/**************************************************************************/ 405 406 SECTION `.text`:CODE:NOROOT(1) 407 THUMB 408_tx_misra_timer_pointer_add: 409 LSLS R1,#2 410 ADD R0,R0,R1 411 BX LR // return 412 413 414/**************************************************************************/ 415/**************************************************************************/ 416/** */ 417/** VOID _tx_misra_user_timer_pointer_get(TX_TIMER_INTERNAL */ 418/** *internal_timer, TX_TIMER **user_timer); */ 419/** */ 420/**************************************************************************/ 421/**************************************************************************/ 422 423 SECTION `.text`:CODE:NOROOT(1) 424 THUMB 425_tx_misra_user_timer_pointer_get: 426 SUBS R0,#8 427 STR R0,[R1, #+0] 428 BX LR // return 429 430 431/**************************************************************************/ 432/**************************************************************************/ 433/** */ 434/** VOID _tx_misra_thread_stack_check(TX_THREAD *thread_ptr, */ 435/** VOID **highest_stack); */ 436/** */ 437/**************************************************************************/ 438/**************************************************************************/ 439 440 SECTION `.text`:CODE:NOROOT(1) 441 THUMB 442_tx_misra_thread_stack_check: 443 PUSH {R3-R5,LR} 444 MOVS R4,R0 445 MOVS R5,R1 446 BL _tx_thread_interrupt_disable 447 CMP R4,#0 448 BEQ.N ??_tx_misra_thread_stack_check_0 449 LDR R1,[R4] 450 LDR.N R2,??DataTable2 // 0x54485244 451 CMP R1,R2 452 BNE.N ??_tx_misra_thread_stack_check_0 453 LDR R1,[R4, #8] 454 LDR R2,[R5] 455 CMP R1,R2 456 BCS.N ??_tx_misra_thread_stack_check_1 457 STR R1,[R5] 458??_tx_misra_thread_stack_check_1: 459 LDR R1,[R4, #12] 460 LDR R1,[R1] 461 LDR R6,=0xEFEFEFEF 462 CMP R1,R6 463 BNE.N ??_tx_misra_thread_stack_check_2 464 LDR R1,[R4, #16] 465 MOVS R7,#1 466 LDR R1,[R1, R7] 467 CMP R1,R6 468 BNE.N ??_tx_misra_thread_stack_check_2 469 LDR R1,[R5] 470 LDR R2,[R4, #12] 471 CMP R1,R2 472 BCS.N ??_tx_misra_thread_stack_check_3 473??_tx_misra_thread_stack_check_2: 474 BL _tx_thread_interrupt_restore 475 MOVS R0,R4 476 BL _tx_thread_stack_error_handler 477 BL _tx_thread_interrupt_disable 478??_tx_misra_thread_stack_check_3: 479 LDR R1,[R5] 480 LDR R7,=-4 481 LDR R1,[R1, R7] 482 CMP R1,R6 483 BEQ.N ??_tx_misra_thread_stack_check_0 484 BL _tx_thread_interrupt_restore 485 MOVS R0,R4 486 BL _tx_thread_stack_analyze 487 BL _tx_thread_interrupt_disable 488??_tx_misra_thread_stack_check_0: 489 BL _tx_thread_interrupt_restore 490 POP {R0,R4,R5,R6,R7,PC} // return 491 492#ifdef TX_ENABLE_EVENT_TRACE 493 494/**************************************************************************/ 495/**************************************************************************/ 496/** */ 497/** VOID _tx_misra_trace_event_insert(ULONG event_id, */ 498/** VOID *info_field_1, ULONG info_field_2, ULONG info_field_3, */ 499/** ULONG info_field_4, ULONG filter, ULONG time_stamp); */ 500/** */ 501/**************************************************************************/ 502/**************************************************************************/ 503 504 SECTION `.text`:CODE:NOROOT(1) 505 THUMB 506_tx_misra_trace_event_insert: 507 PUSH {R3-R7,LR} 508 LDR.N R4,??DataTable2_1 509 LDR R4,[R4, #+0] 510 CMP R4,#+0 511 BEQ.N ??_tx_misra_trace_event_insert_0 512 LDR.N R5,??DataTable2_2 513 LDR R5,[R5, #+0] 514 LDR R6,[SP, #+28] 515 TST R5,R6 516 BEQ.N ??_tx_misra_trace_event_insert_0 517 LDR.N R5,??DataTable2_3 518 LDR R5,[R5, #+0] 519 LDR.N R6,??DataTable2_4 520 LDR R6,[R6, #+0] 521 CMP R5,#+0 522 BNE.N ??_tx_misra_trace_event_insert_1 523 LDR R5,[R6, #+44] 524 LDR R7,[R6, #+60] 525 LSLS R7,R7,#+16 526 ORRS R7,R7,#0x80000000 527 ORRS R5,R7,R5 528 B.N ??_tx_misra_trace_event_insert_2 529??_tx_misra_trace_event_insert_1: 530 CMP R5,#-252645136 531 BCS.N ??_tx_misra_trace_event_insert_3 532 MOVS R5,R6 533 MOVS R6,#-1 534 B.N ??_tx_misra_trace_event_insert_2 535??_tx_misra_trace_event_insert_3: 536 MOVS R6,#-252645136 537 MOVS R5,#+0 538??_tx_misra_trace_event_insert_2: 539 STR R6,[R4, #+0] 540 STR R5,[R4, #+4] 541 STR R0,[R4, #+8] 542 LDR R0,[SP, #+32] 543 STR R0,[R4, #+12] 544 STR R1,[R4, #+16] 545 STR R2,[R4, #+20] 546 STR R3,[R4, #+24] 547 LDR R0,[SP, #+24] 548 STR R0,[R4, #+28] 549 ADDS R4,R4,#+32 550 LDR.N R0,??DataTable2_5 551 LDR R0,[R0, #+0] 552 CMP R4,R0 553 BCC.N ??_tx_misra_trace_event_insert_4 554 LDR.N R0,??DataTable2_6 555 LDR R4,[R0, #+0] 556 LDR.N R0,??DataTable2_1 557 STR R4,[R0, #+0] 558 LDR.N R0,??DataTable2_7 559 LDR R0,[R0, #+0] 560 STR R4,[R0, #+32] 561 LDR.N R0,??DataTable2_8 562 LDR R0,[R0, #+0] 563 CMP R0,#+0 564 BEQ.N ??_tx_misra_trace_event_insert_0 565 LDR.N R0,??DataTable2_7 566 LDR R0,[R0, #+0] 567 LDR.N R1,??DataTable2_8 568 LDR R1,[R1, #+0] 569 BLX R1 570 B.N ??_tx_misra_trace_event_insert_0 571??_tx_misra_trace_event_insert_4: 572 LDR.N R0,??DataTable2_1 573 STR R4,[R0, #+0] 574 LDR.N R0,??DataTable2_7 575 LDR R0,[R0, #+0] 576 STR R4,[R0, #+32] 577??_tx_misra_trace_event_insert_0: 578 POP {R0,R4-R7,PC} // return 579 580 581 SECTION `.text`:CODE:NOROOT(2) 582 SECTION_TYPE SHT_PROGBITS, 0 583 DATA 584??DataTable2_1: 585 DC32 _tx_trace_buffer_current_ptr 586 587 SECTION `.text`:CODE:NOROOT(2) 588 SECTION_TYPE SHT_PROGBITS, 0 589 DATA 590??DataTable2_2: 591 DC32 _tx_trace_event_enable_bits 592 593 SECTION `.text`:CODE:NOROOT(2) 594 SECTION_TYPE SHT_PROGBITS, 0 595 DATA 596??DataTable2_5: 597 DC32 _tx_trace_buffer_end_ptr 598 599 SECTION `.text`:CODE:NOROOT(2) 600 SECTION_TYPE SHT_PROGBITS, 0 601 DATA 602??DataTable2_6: 603 DC32 _tx_trace_buffer_start_ptr 604 605 SECTION `.text`:CODE:NOROOT(2) 606 SECTION_TYPE SHT_PROGBITS, 0 607 DATA 608??DataTable2_7: 609 DC32 _tx_trace_header_ptr 610 611 SECTION `.text`:CODE:NOROOT(2) 612 SECTION_TYPE SHT_PROGBITS, 0 613 DATA 614??DataTable2_8: 615 DC32 _tx_trace_full_notify_function 616 617 618/**************************************************************************/ 619/**************************************************************************/ 620/** */ 621/** ULONG _tx_misra_time_stamp_get(VOID); */ 622/** */ 623/**************************************************************************/ 624/**************************************************************************/ 625 626 SECTION `.text`:CODE:NOROOT(1) 627 THUMB 628_tx_misra_time_stamp_get: 629 MOVS R0,#+0 630 BX LR // return 631 632#endif 633 634 SECTION `.text`:CODE:NOROOT(2) 635 SECTION_TYPE SHT_PROGBITS, 0 636 DATA 637??DataTable2: 638 DC32 0x54485244 639 640 SECTION `.text`:CODE:NOROOT(2) 641 SECTION_TYPE SHT_PROGBITS, 0 642 DATA 643??DataTable2_3: 644 DC32 _tx_thread_system_state 645 646 SECTION `.text`:CODE:NOROOT(2) 647 SECTION_TYPE SHT_PROGBITS, 0 648 DATA 649??DataTable2_4: 650 DC32 _tx_thread_current_ptr 651 652 653/**************************************************************************/ 654/**************************************************************************/ 655/** */ 656/** UINT _tx_misra_always_true(void); */ 657/** */ 658/**************************************************************************/ 659/**************************************************************************/ 660 661 SECTION `.text`:CODE:NOROOT(1) 662 THUMB 663_tx_misra_always_true: 664 MOVS R0,#+1 665 BX LR // return 666 667 668/**************************************************************************/ 669/**************************************************************************/ 670/** */ 671/** UINT _tx_misra_status_get(UINT status); */ 672/** */ 673/**************************************************************************/ 674/**************************************************************************/ 675 676 SECTION `.text`:CODE:NOROOT(1) 677 THUMB 678_tx_misra_status_get: 679 MOVS R0,#+0 680 BX LR // return 681 682 683/***********************************************************************************************/ 684/***********************************************************************************************/ 685/** */ 686/** ULONG _tx_misra_ipsr_get(void); */ 687/** */ 688/***********************************************************************************************/ 689/***********************************************************************************************/ 690 691 SECTION `.text`:CODE:NOROOT(1) 692 THUMB 693_tx_misra_ipsr_get: 694 MRS R0, IPSR 695 BX LR // return 696 697 698/***********************************************************************************************/ 699/***********************************************************************************************/ 700/** */ 701/** ULONG _tx_misra_control_get(void); */ 702/** */ 703/***********************************************************************************************/ 704/***********************************************************************************************/ 705 706 SECTION `.text`:CODE:NOROOT(1) 707 THUMB 708_tx_misra_control_get: 709 MRS R0, CONTROL 710 BX LR // return 711 712 713/***********************************************************************************************/ 714/***********************************************************************************************/ 715/** */ 716/** void _tx_misra_control_set(ULONG value); */ 717/** */ 718/***********************************************************************************************/ 719/***********************************************************************************************/ 720 721 SECTION `.text`:CODE:NOROOT(1) 722 THUMB 723_tx_misra_control_set: 724 MSR CONTROL, R0 725 BX LR // return 726 727 728#ifdef __ARMVFP__ 729 730/***********************************************************************************************/ 731/***********************************************************************************************/ 732/** */ 733/** ULONG _tx_misra_fpccr_get(void); */ 734/** */ 735/***********************************************************************************************/ 736/***********************************************************************************************/ 737 738 SECTION `.text`:CODE:NOROOT(2) 739 THUMB 740_tx_misra_fpccr_get: 741 LDR r0, =0xE000EF34 // Build FPCCR address 742 LDR r0, [r0] // Load FPCCR value 743 BX LR // return 744 745 746/***********************************************************************************************/ 747/***********************************************************************************************/ 748/** */ 749/** void _tx_misra_vfp_touch(void); */ 750/** */ 751/***********************************************************************************************/ 752/***********************************************************************************************/ 753 754 SECTION `.text`:CODE:NOROOT(1) 755 THUMB 756_tx_misra_vfp_touch: 757 vmov.f32 s0, s0 758 BX LR // return 759 760#endif 761 762 763 SECTION `.iar_vfe_header`:DATA:NOALLOC:NOROOT(2) 764 SECTION_TYPE SHT_PROGBITS, 0 765 DATA 766 DC32 0 767 768 END 769
