1-c
2-heap  0x400
3-stack 0x1000
4-l C:\ti\pdk_C6678_1_1_2_6\packages\ti\csl\lib\ti.csl.ae66
5-l C:\ti\pdk_C6678_1_1_2_6\packages\ti\csl\lib\ti.csl.intc.ae66
6
7/* Memory Map */
8MEMORY
9{
10    L1PSRAM (RWX)  : org = 0x00E00000,  len = 0x00008000
11    L1DSRAM (RWX)  : org = 0x00F00000,  len = 0x00008000
12    CODE_RAM (RWX) : org = 0x00800000,  len = 0x00020000
13    DATA_RAM (RWX) : org = 0x00820000,  len = 0x00060000
14    MSMCSRAM (RWX) : org = 0x0c000000,  len = 0x00400000
15    DDR3 (RWX)     : org = 0x80000000,  len = 0x80000000
16}
17
18SECTIONS
19{
20	.text          >  CODE_RAM
21	.stack         >  CODE_RAM
22	.cio           >  CODE_RAM
23	.const         >  CODE_RAM
24	.data          >  CODE_RAM
25	.switch        >  CODE_RAM
26	.sysmem        >  CODE_RAM
27	.far           >  CODE_RAM
28	.args          >  CODE_RAM
29	.ppinfo        >  CODE_RAM
30	.ppdata        >  CODE_RAM
31	.csl_vect      >  CODE_RAM
32
33	GROUP
34	{
35		.neardata
36		.rodata
37		.bss
38	} > CODE_RAM
39
40	/* COFF sections */
41	.pinit         >  CODE_RAM
42	.cinit         >  CODE_RAM
43
44	/* EABI sections */
45	.binit         >  CODE_RAM
46	.init_array    >  CODE_RAM
47	.fardata       >  CODE_RAM
48	.c6xabi.exidx  >  CODE_RAM
49	.c6xabi.extab  >  CODE_RAM
50
51	/* ThreadX section which should be the last RAM section loaded */
52	.zend          >  DATA_RAM
53}
54