1@/**************************************************************************/ 2@/* */ 3@/* Copyright (c) Microsoft Corporation. All rights reserved. */ 4@/* */ 5@/* This software is licensed under the Microsoft Software License */ 6@/* Terms for Microsoft Azure RTOS. Full text of the license can be */ 7@/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ 8@/* and in the root directory of this software. */ 9@/* */ 10@/**************************************************************************/ 11@ 12@ 13@/**************************************************************************/ 14@/**************************************************************************/ 15@/** */ 16@/** ThreadX Component */ 17@/** */ 18@/** Thread */ 19@/** */ 20@/**************************************************************************/ 21@/**************************************************************************/ 22#ifdef TX_INCLUDE_USER_DEFINE_FILE 23#include "tx_user.h" 24#endif 25 26IRQ_DISABLE = 0x80 @ IRQ disable bit 27MODE_MASK = 0x1F @ Mode mask 28SYS_MODE_BITS = 0x1F @ System mode bits 29@ 30@ 31@/* No 16-bit Thumb mode veneer code is needed for _tx_thread_irq_nesting_start 32@ since it will never be called 16-bit mode. */ 33@ 34 .arm 35 .text 36 .align 2 37@/**************************************************************************/ 38@/* */ 39@/* FUNCTION RELEASE */ 40@/* */ 41@/* _tx_thread_irq_nesting_start ARM9/GNU */ 42@/* 6.2.1 */ 43@/* AUTHOR */ 44@/* */ 45@/* William E. Lamie, Microsoft Corporation */ 46@/* */ 47@/* DESCRIPTION */ 48@/* */ 49@/* This function is called by the application from IRQ mode after */ 50@/* _tx_thread_context_save has been called and switches the IRQ */ 51@/* processing to the system mode so nested IRQ interrupt processing */ 52@/* is possible (system mode has its own "lr" register). Note that */ 53@/* this function assumes that the system mode stack pointer was setup */ 54@/* during low-level initialization (tx_initialize_low_level.s). */ 55@/* */ 56@/* This function returns with IRQ interrupts enabled. */ 57@/* */ 58@/* INPUT */ 59@/* */ 60@/* None */ 61@/* */ 62@/* OUTPUT */ 63@/* */ 64@/* None */ 65@/* */ 66@/* CALLS */ 67@/* */ 68@/* None */ 69@/* */ 70@/* CALLED BY */ 71@/* */ 72@/* ISRs */ 73@/* */ 74@/* RELEASE HISTORY */ 75@/* */ 76@/* DATE NAME DESCRIPTION */ 77@/* */ 78@/* 09-30-2020 William E. Lamie Initial Version 6.1 */ 79@/* 03-08-2023 Cindy Deng Modified comment(s), added */ 80@/* #include tx_user.h, */ 81@/* resulting in version 6.2.1 */ 82@/* */ 83@/**************************************************************************/ 84@VOID _tx_thread_irq_nesting_start(VOID) 85@{ 86 .global _tx_thread_irq_nesting_start 87 .type _tx_thread_irq_nesting_start,function 88_tx_thread_irq_nesting_start: 89 MOV r3,lr @ Save ISR return address 90 MRS r0, CPSR @ Pickup the CPSR 91 BIC r0, r0, #MODE_MASK @ Clear the mode bits 92 ORR r0, r0, #SYS_MODE_BITS @ Build system mode CPSR 93 MSR CPSR_cxsf, r0 @ Enter system mode 94 STMDB sp!, {r1, lr} @ Push the system mode lr on the system mode stack 95 @ and push r1 just to keep 8-byte alignment 96 BIC r0, r0, #IRQ_DISABLE @ Build enable IRQ CPSR 97 MSR CPSR_cxsf, r0 @ Enter system mode 98 MOV pc, r3 @ Return to caller 99@} 100 101