1;/**************************************************************************/ 2;/* */ 3;/* Copyright (c) Microsoft Corporation. All rights reserved. */ 4;/* */ 5;/* This software is licensed under the Microsoft Software License */ 6;/* Terms for Microsoft Azure RTOS. Full text of the license can be */ 7;/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ 8;/* and in the root directory of this software. */ 9;/* */ 10;/**************************************************************************/ 11; 12; 13;/**************************************************************************/ 14;/**************************************************************************/ 15;/** */ 16;/** ThreadX Component */ 17;/** */ 18;/** Thread */ 19;/** */ 20;/**************************************************************************/ 21;/**************************************************************************/ 22; 23;#define TX_SOURCE_CODE 24; 25; 26;/* Include necessary system files. */ 27; 28;#include "tx_api.h" 29;#include "tx_thread.h" 30; 31; 32 IF :DEF:TX_ENABLE_FIQ_SUPPORT 33DISABLE_INTS EQU 0xC0 ; IRQ & FIQ interrupts disabled 34 ELSE 35DISABLE_INTS EQU 0x80 ; IRQ interrupts disabled 36 ENDIF 37; 38; 39 AREA ||.text||, CODE, READONLY 40;/**************************************************************************/ 41;/* */ 42;/* FUNCTION RELEASE */ 43;/* */ 44;/* _tx_thread_interrupt_disable ARM9/AC5 */ 45;/* 6.1 */ 46;/* AUTHOR */ 47;/* */ 48;/* William E. Lamie, Microsoft Corporation */ 49;/* */ 50;/* DESCRIPTION */ 51;/* */ 52;/* This function is responsible for disabling interrupts */ 53;/* */ 54;/* INPUT */ 55;/* */ 56;/* None */ 57;/* */ 58;/* OUTPUT */ 59;/* */ 60;/* old_posture Old interrupt lockout posture */ 61;/* */ 62;/* CALLS */ 63;/* */ 64;/* None */ 65;/* */ 66;/* CALLED BY */ 67;/* */ 68;/* Application Code */ 69;/* */ 70;/* RELEASE HISTORY */ 71;/* */ 72;/* DATE NAME DESCRIPTION */ 73;/* */ 74;/* 09-30-2020 William E. Lamie Initial Version 6.1 */ 75;/* */ 76;/**************************************************************************/ 77;UINT _tx_thread_interrupt_disable(void) 78;{ 79 EXPORT _tx_thread_interrupt_disable 80_tx_thread_interrupt_disable 81; 82; /* Pickup current interrupt lockout posture. */ 83; 84 MRS r0, CPSR ; Pickup current CPSR 85; 86; /* Mask interrupts. */ 87; 88 ORR r1, r0, #DISABLE_INTS ; Mask interrupts 89 MSR CPSR_cxsf, r1 ; Setup new CPSR 90 IF {INTER} = {TRUE} 91 BX lr ; Return to caller 92 ELSE 93 MOV pc, lr ; Return to caller 94 ENDIF 95;} 96; 97 END 98 99