1;/**************************************************************************/ 2;/* */ 3;/* Copyright (c) Microsoft Corporation. All rights reserved. */ 4;/* */ 5;/* This software is licensed under the Microsoft Software License */ 6;/* Terms for Microsoft Azure RTOS. Full text of the license can be */ 7;/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ 8;/* and in the root directory of this software. */ 9;/* */ 10;/**************************************************************************/ 11; 12; 13;/**************************************************************************/ 14;/**************************************************************************/ 15;/** */ 16;/** ThreadX Component */ 17;/** */ 18;/** Thread */ 19;/** */ 20;/**************************************************************************/ 21;/**************************************************************************/ 22; 23;#define TX_SOURCE_CODE 24; 25; 26;/* Include necessary system files. */ 27; 28;#include "tx_api.h" 29;#include "tx_thread.h" 30; 31; 32 IF :DEF:TX_ENABLE_FIQ_SUPPORT 33INT_MASK EQU 0xC0 ; Interrupt bit mask 34 ELSE 35INT_MASK EQU 0x80 ; Interrupt bit mask 36 ENDIF 37; 38; 39 AREA ||.text||, CODE, READONLY 40;/**************************************************************************/ 41;/* */ 42;/* FUNCTION RELEASE */ 43;/* */ 44;/* _tx_thread_interrupt_control ARM9/AC5 */ 45;/* 6.1 */ 46;/* AUTHOR */ 47;/* */ 48;/* William E. Lamie, Microsoft Corporation */ 49;/* */ 50;/* DESCRIPTION */ 51;/* */ 52;/* This function is responsible for changing the interrupt lockout */ 53;/* posture of the system. */ 54;/* */ 55;/* INPUT */ 56;/* */ 57;/* new_posture New interrupt lockout posture */ 58;/* */ 59;/* OUTPUT */ 60;/* */ 61;/* old_posture Old interrupt lockout posture */ 62;/* */ 63;/* CALLS */ 64;/* */ 65;/* None */ 66;/* */ 67;/* CALLED BY */ 68;/* */ 69;/* Application Code */ 70;/* */ 71;/* RELEASE HISTORY */ 72;/* */ 73;/* DATE NAME DESCRIPTION */ 74;/* */ 75;/* 09-30-2020 William E. Lamie Initial Version 6.1 */ 76;/* */ 77;/**************************************************************************/ 78;UINT _tx_thread_interrupt_control(UINT new_posture) 79;{ 80 EXPORT _tx_thread_interrupt_control 81_tx_thread_interrupt_control 82; 83; /* Pickup current interrupt lockout posture. */ 84; 85 MRS r3, CPSR ; Pickup current CPSR 86 BIC r1, r3, #INT_MASK ; Clear interrupt lockout bits 87 ORR r1, r1, r0 ; Or-in new interrupt lockout bits 88; 89; /* Apply the new interrupt posture. */ 90; 91 MSR CPSR_cxsf, r1 ; Setup new CPSR 92 AND r0, r3, #INT_MASK ; Return previous interrupt mask 93 IF {INTER} = {TRUE} 94 BX lr ; Return to caller 95 ELSE 96 MOV pc, lr ; Return to caller 97 ENDIF 98; 99;} 100; 101 END 102 103