1;/**************************************************************************/ 2;/* */ 3;/* Copyright (c) Microsoft Corporation. All rights reserved. */ 4;/* */ 5;/* This software is licensed under the Microsoft Software License */ 6;/* Terms for Microsoft Azure RTOS. Full text of the license can be */ 7;/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ 8;/* and in the root directory of this software. */ 9;/* */ 10;/**************************************************************************/ 11; 12; 13;/**************************************************************************/ 14;/**************************************************************************/ 15;/** */ 16;/** ThreadX Component */ 17;/** */ 18;/** Thread */ 19;/** */ 20;/**************************************************************************/ 21;/**************************************************************************/ 22; 23;#define TX_SOURCE_CODE 24; 25; 26;/* Include necessary system files. */ 27; 28;#include "tx_api.h" 29;#include "tx_thread.h" 30; 31; 32#ifdef TX_ENABLE_FIQ_SUPPORT 33INT_MASK DEFINE 0xC0 ; Interrupt bit mask 34#else 35INT_MASK DEFINE 0x80 ; Interrupt bit mask 36#endif 37; 38; 39;/**************************************************************************/ 40;/* */ 41;/* FUNCTION RELEASE */ 42;/* */ 43;/* _tx_thread_interrupt_control ARM11/IAR */ 44;/* 6.1 */ 45;/* AUTHOR */ 46;/* */ 47;/* William E. Lamie, Microsoft Corporation */ 48;/* */ 49;/* DESCRIPTION */ 50;/* */ 51;/* This function is responsible for changing the interrupt lockout */ 52;/* posture of the system. */ 53;/* */ 54;/* INPUT */ 55;/* */ 56;/* new_posture New interrupt lockout posture */ 57;/* */ 58;/* OUTPUT */ 59;/* */ 60;/* old_posture Old interrupt lockout posture */ 61;/* */ 62;/* CALLS */ 63;/* */ 64;/* None */ 65;/* */ 66;/* CALLED BY */ 67;/* */ 68;/* Application Code */ 69;/* */ 70;/* RELEASE HISTORY */ 71;/* */ 72;/* DATE NAME DESCRIPTION */ 73;/* */ 74;/* 09-30-2020 William E. Lamie Initial Version 6.1 */ 75;/* */ 76;/**************************************************************************/ 77;UINT _tx_thread_interrupt_control(UINT new_posture) 78;{ 79 RSEG .text:CODE:NOROOT(2) 80 PUBLIC _tx_thread_interrupt_control 81 CODE32 82_tx_thread_interrupt_control 83; 84; /* Pickup current interrupt lockout posture. */ 85; 86 MRS r3, CPSR ; Pickup current CPSR 87 BIC r1, r3, #INT_MASK ; Clear interrupt lockout bits 88 ORR r1, r1, r0 ; Or-in new interrupt lockout bits 89; 90; /* Apply the new interrupt posture. */ 91; 92 MSR CPSR_cxsf, r1 ; Setup new CPSR 93 AND r0, r3, #INT_MASK ; Return previous interrupt mask 94#ifdef TX_THUMB 95 BX lr ; Return to caller 96#else 97 MOV pc, lr ; Return to caller 98#endif 99; 100;} 101; 102; 103 END 104