1;/**************************************************************************/ 2;/* */ 3;/* Copyright (c) Microsoft Corporation. All rights reserved. */ 4;/* */ 5;/* This software is licensed under the Microsoft Software License */ 6;/* Terms for Microsoft Azure RTOS. Full text of the license can be */ 7;/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ 8;/* and in the root directory of this software. */ 9;/* */ 10;/**************************************************************************/ 11; 12; 13;/**************************************************************************/ 14;/**************************************************************************/ 15;/** */ 16;/** ThreadX Component */ 17;/** */ 18;/** Thread */ 19;/** */ 20;/**************************************************************************/ 21;/**************************************************************************/ 22#ifdef TX_INCLUDE_USER_DEFINE_FILE 23#include "tx_user.h" 24#endif 25 26;/**************************************************************************/ 27;/* */ 28;/* FUNCTION RELEASE */ 29;/* */ 30;/* _tx_thread_context_fast_save ARC_HS/MetaWare */ 31;/* 6.2.1 */ 32;/* AUTHOR */ 33;/* */ 34;/* William E. Lamie, Microsoft Corporation */ 35;/* */ 36;/* DESCRIPTION */ 37;/* */ 38;/* This function saves the context of an executing thread in the */ 39;/* beginning of fast interrupt processing. The function assumes that */ 40;/* fast interrupts are enabled (priority 0) and multiple register */ 41;/* banks are available. In this case, register bank 1 is reserved by */ 42;/* hardware for fast interrupts. Additional assumptions include that */ 43;/* there will be no nested fast interrupts and the LP_START, LP_END, */ 44;/* and LP_COUNT registers are not used in the application's fast */ 45;/* interrupt ISR. */ 46;/* */ 47;/* INPUT */ 48;/* */ 49;/* None */ 50;/* */ 51;/* OUTPUT */ 52;/* */ 53;/* None */ 54;/* */ 55;/* CALLS */ 56;/* */ 57;/* None */ 58;/* */ 59;/* CALLED BY */ 60;/* */ 61;/* ISRs */ 62;/* */ 63;/* RELEASE HISTORY */ 64;/* */ 65;/* DATE NAME DESCRIPTION */ 66;/* */ 67;/* 09-30-2020 William E. Lamie Initial Version 6.1 */ 68;/* 03-08-2023 Cindy Deng Modified comment(s), added */ 69;/* #include tx_user.h, */ 70;/* resulting in version 6.2.1 */ 71;/* */ 72;/**************************************************************************/ 73;VOID _tx_thread_context_fast_save(VOID) 74;{ 75 .global _tx_thread_context_fast_save 76 .type _tx_thread_context_fast_save, @function 77_tx_thread_context_fast_save: 78; 79; /* Increment nested interrupt count. */ 80; _tx_thread_system_state++; 81; 82 ld r0, [gp, _tx_thread_system_state@sda] ; Pickup system state 83 add r0, r0, 1 ; Increment the nested interrupt count 84 st r0, [gp, _tx_thread_system_state@sda] ; Update system state 85; 86; 87 .ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY 88; 89; /* Call the ISR enter function to indicate an ISR is executing. */ 90; 91 sub sp, sp, 32 ; Allocating some space on the stack 92 st blink, [sp, 16] ; Save blink 93 bl.d _tx_execution_isr_enter ; Call the ISR enter function 94 nop ; Delay slot 95 ld blink, [sp, 16] ; Recover blink 96 add sp, sp, 32 ; Recover the stack space 97 .endif 98; 99 100 j [blink] ; Return to the ISR 101; 102;} 103 .end 104