1;/**************************************************************************/ 2;/* */ 3;/* Copyright (c) Microsoft Corporation. All rights reserved. */ 4;/* */ 5;/* This software is licensed under the Microsoft Software License */ 6;/* Terms for Microsoft Azure RTOS. Full text of the license can be */ 7;/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ 8;/* and in the root directory of this software. */ 9;/* */ 10;/**************************************************************************/ 11; 12; 13;/**************************************************************************/ 14;/**************************************************************************/ 15;/** */ 16;/** ThreadX Component */ 17;/** */ 18;/** Thread */ 19;/** */ 20;/**************************************************************************/ 21;/**************************************************************************/ 22; 23; 24;#define TX_SOURCE_CODE 25; 26; 27;/* Include necessary system files. */ 28; 29;#include "tx_api.h" 30;#include "tx_thread.h" 31;#include "tx_timer.h" 32; 33; 34 .global __tx_thread_system_state 35 .global __tx_thread_current_ptr 36 .global __tx_thread_system_stack_ptr 37 .global __tx_thread_execute_ptr 38 .global __tx_timer_time_slice 39 .global __tx_thread_schedule 40 .global __tx_thread_preempt_disable 41 42 .text 43 44;/**************************************************************************/ 45;/* */ 46;/* FUNCTION RELEASE */ 47;/* */ 48;/* _tx_thread_context_restore RXv3/GNURX */ 49;/* 6.1.11 */ 50;/* AUTHOR */ 51;/* */ 52;/* William E. Lamie, Microsoft Corporation */ 53;/* */ 54;/* DESCRIPTION */ 55;/* */ 56;/* This function restores the interrupt context if it is processing a */ 57;/* nested interrupt. If not, it returns to the interrupt thread if no */ 58;/* preemption is necessary. Otherwise, if preemption is necessary or */ 59;/* if no thread was running, the function returns to the scheduler. */ 60;/* */ 61;/* INPUT */ 62;/* */ 63;/* None */ 64;/* */ 65;/* OUTPUT */ 66;/* */ 67;/* None */ 68;/* */ 69;/* CALLS */ 70;/* */ 71;/* _tx_thread_schedule Thread scheduling routine */ 72;/* */ 73;/* CALLED BY */ 74;/* */ 75;/* ISRs Interrupt Service Routines */ 76;/* */ 77;/* RELEASE HISTORY */ 78;/* */ 79;/* DATE NAME DESCRIPTION */ 80;/* */ 81;/* 06-02-2021 William E. Lamie Initial Version 6.1.7 */ 82;/* 10-15-2021 William E. Lamie Modified comment(s), and */ 83;/* added FPU support, */ 84;/* resulting in version 6.1.9 */ 85;/* 01-31-2022 William E. Lamie Modified comment(s), */ 86;/* resulting in version 6.1.10 */ 87;/* 04-25-2022 William E. Lamie Modified comment(s), */ 88;/* resulting in version 6.1.11 */ 89;/* */ 90;/**************************************************************************/ 91;VOID _tx_thread_context_restore(VOID) 92;{ 93 .global __tx_thread_context_restore 94__tx_thread_context_restore: 95; 96; /* Lockout interrupts. */ 97 98 CLRPSW I ; Disable interrupts 99 100; /* Determine if interrupts are nested. */ 101; if (--_tx_thread_system_state) 102; { 103 104 MOV.L #__tx_thread_system_state, R1 105 MOV.L [R1], R2 106 SUB #1, R2 107 MOV.L R2,[R1] 108 BEQ __tx_thread_not_nested_restore 109 110; 111; /* Interrupts are nested. */ 112; 113; /* Recover the saved registers from the interrupt stack 114; and return to the point of interrupt. */ 115; 116__tx_thread_nested_restore: 117 POPC FPSW ; Restore FPU status 118 POPM R14-R15 ; Restore R14-R15 119 POPM R3-R5 ; Restore R3-R5 120 POPM R1-R2 ; Restore R1-R2 121 RTE ; Return to point of interrupt, restore PSW including IPL 122; } 123 124__tx_thread_not_nested_restore: 125; 126; /* Determine if a thread was interrupted and no preemption is required. */ 127; else if (((_tx_thread_current_ptr) && (_tx_thread_current_ptr == _tx_thread_execute_ptr) 128; || (_tx_thread_preempt_disable)) 129; { 130 131 MOV.L #__tx_thread_current_ptr, R1 ; Pickup current thread ptr address 132 MOV.L [R1], R2 133 CMP #0, R2 134 BEQ __tx_thread_idle_system_restore 135 136 MOV.L #__tx_thread_preempt_disable, R3 ; Pick up preempt disable flag 137 MOV.L [R3], R3 138 CMP #0, R3 139 BNE __tx_thread_no_preempt_restore ; If pre-empt disable flag set, we simply return to the original point of interrupt regardless 140 141 MOV.L #__tx_thread_execute_ptr, R3 ; (_tx_thread_current_ptr != _tx_thread_execute_ptr) 142 CMP [R3], R2 143 BNE __tx_thread_preempt_restore ; Jump to pre-empt restoring 144; 145__tx_thread_no_preempt_restore: 146 SETPSW U ; User stack 147 POPC FPSW ; Restore FPU status 148 POPM R14-R15 ; Restore R14-R15 149 POPM R3-R5 ; Restore R3-R5 150 POPM R1-R2 ; Restore R1-R2 151 RTE ; Return to point of interrupt, restore PSW including IPL 152 153; } 154; else 155; { 156 157__tx_thread_preempt_restore: 158 159; /* Save the remaining time-slice and disable it. */ 160; if (_tx_timer_time_slice) 161; { 162 163 MOV.L #__tx_timer_time_slice, R3 ; Pickup time-slice address 164 MOV.L [R3],R4 ; Pickup actual time-slice 165 CMP #0, R4 166 BEQ __tx_thread_dont_save_ts ; No time slice to save 167; 168; _tx_thread_current_ptr -> tx_thread_time_slice = _tx_timer_time_slice; 169; _tx_timer_time_slice = 0; 170; 171 MOV.L R4,24[R2] ; Save thread's time slice 172 MOV.L #0,R4 ; Clear value 173 MOV.L R4,[R3] ; Disable global time slice flag 174; } 175__tx_thread_dont_save_ts: 176; 177; /* Now store the remaining registers! */ 178 179 SETPSW U ; User stack 180 PUSHM R6-R13 181 182 MVFACGU #0, A1, R4 ; Save accumulators. 183 MVFACHI #0, A1, R5 184 MVFACLO #0, A1, R6 185 PUSHM R4-R6 186 MVFACGU #0, A0, R4 187 MVFACHI #0, A0, R5 188 MVFACLO #0, A0, R6 189 PUSHM R4-R6 190 191#if (__RX_DFPU_INSNS__ == 1) 192 MOV.L 144[R2], R4 ; Get tx_thread_fpu_enable. 193 CMP #0, R4 194 BEQ __tx_thread_preempt_restore_fpu_skip 195 196 DPUSHM.D DR0-DR15 ; Save FPU register bank if tx_thread_fpu_enable is not 0. 197 DPUSHM.L DPSW-DECNT 198 199__tx_thread_preempt_restore_fpu_skip: 200#endif 201 202; 203; /* Clear the current task pointer. */ 204; _tx_thread_current_ptr = TX_NULL; 205; R1 -> _tx_thread_current_ptr 206; R2 -> *_tx_thread_current_ptr 207 208 MOV.L R0,8[R2] ; Save thread's stack pointer in thread control block 209 MOV.L #0,R2 ; Build NULL value 210 MOV.L R2,[R1] ; Set current thread to NULL 211 212; /* Return to the scheduler. */ 213; _tx_thread_schedule(); 214 215__tx_thread_idle_system_restore: 216 MVTC #0, PSW ; Reset interrupt priority level to 0 217 BRA __tx_thread_schedule ; Jump to scheduler 218; } 219; 220;} 221; 222 .end 223 224 225
