1;/**************************************************************************/
2;/*                                                                        */
3;/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
4;/*                                                                        */
5;/*       This software is licensed under the Microsoft Software License   */
6;/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
7;/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
8;/*       and in the root directory of this software.                      */
9;/*                                                                        */
10;/**************************************************************************/
11;
12;
13;/**************************************************************************/
14;/**************************************************************************/
15;/**                                                                       */
16;/** ThreadX Component                                                     */
17;/**                                                                       */
18;/**   Thread                                                              */
19;/**                                                                       */
20;/**************************************************************************/
21;/**************************************************************************/
22;
23;
24;#define TX_SOURCE_CODE
25;
26;
27;/* Include necessary system files.  */
28;
29;#include "tx_api.h"
30;#include "tx_thread.h"
31;#include "tx_timer.h"
32;
33FP          .set    A15
34DP          .set    B14
35SP          .set    B15
36;
37    .global     _tx_thread_system_state
38    .global     _tx_thread_current_ptr
39    .global     _tx_thread_system_stack_ptr
40    .global     _tx_thread_execute_ptr
41    .global     _tx_timer_time_slice
42    .global     _tx_thread_schedule
43    .global     _tx_thread_preempt_disable
44;
45;
46    .sect   ".text"
47;/**************************************************************************/
48;/*                                                                        */
49;/*  FUNCTION                                               RELEASE        */
50;/*                                                                        */
51;/*    _tx_thread_context_restore                          C667x/TI        */
52;/*                                                           6.1          */
53;/*  AUTHOR                                                                */
54;/*                                                                        */
55;/*    William E. Lamie, Microsoft Corporation                             */
56;/*                                                                        */
57;/*  DESCRIPTION                                                           */
58;/*                                                                        */
59;/*    This function restores the interrupt context if it is processing a  */
60;/*    nested interrupt.  If not, it returns to the interrupt thread if no */
61;/*    preemption is necessary.  Otherwise, if preemption is necessary or  */
62;/*    if no thread was running, the function returns to the scheduler.    */
63;/*                                                                        */
64;/*  INPUT                                                                 */
65;/*                                                                        */
66;/*    None                                                                */
67;/*                                                                        */
68;/*  OUTPUT                                                                */
69;/*                                                                        */
70;/*    None                                                                */
71;/*                                                                        */
72;/*  CALLS                                                                 */
73;/*                                                                        */
74;/*    _tx_thread_schedule                   Thread scheduling routine     */
75;/*                                                                        */
76;/*  CALLED BY                                                             */
77;/*                                                                        */
78;/*    ISRs                                  Interrupt Service Routines    */
79;/*                                                                        */
80;/*  RELEASE HISTORY                                                       */
81;/*                                                                        */
82;/*    DATE              NAME                      DESCRIPTION             */
83;/*                                                                        */
84;/*  09-30-2020     William E. Lamie         Initial Version 6.1           */
85;/*                                                                        */
86;/**************************************************************************/
87;VOID   _tx_thread_context_restore(VOID)
88;{
89    .global _tx_thread_context_restore
90_tx_thread_context_restore:
91;
92;    /* Lockout interrupts.  */
93;
94        MVC         CSR,B0                              ; Pickup CSR
95        AND         -2,B0,B0                            ; Build interrupt lockout value
96        MVC         B0,CSR                              ; Lockout interrupts
97;
98;    /* Determine if interrupts are nested.  */
99;    if (--_tx_thread_system_state)
100;    {
101;
102        MVKL        _tx_thread_system_state,A0          ; Build address of system state
103        MVKH        _tx_thread_system_state,A0          ;
104        LDW         *A0,A1                              ; Pickup system state variable
105        MVKL        _tx_thread_current_ptr,A2           ; Build address of current thread ptr
106        NOP         3                                   ; Delay slots
107        SUB         A1,1,A1                             ; Decrement system state
108 [!A1]  B           _tx_thread_not_nested_restore       ; If 0, not a nested restore
109        MVKH        _tx_thread_current_ptr,A2           ;
110        LDW         *A2,A3                              ; Pickup current thread pointer
111        STW         A1,*A0                              ; Store system state
112        NOP         2                                   ; Delay slots
113;
114;    /* Interrupts are nested.  */
115;
116;    /* Just recover the saved registers and return to the point of
117;       interrupt.  */
118;
119        LDW         *+SP(8),B0                          ; Recover saved CSR
120        LDW         *+SP(12),B1                         ; Recover saved IRP
121        LDW         *+SP(16),B2                         ; Recover saved AMR
122        LDW         *+SP(20),A0                         ; Recover A0
123        LDW         *+SP(24),A1                         ; Recover A1
124        LDW         *+SP(28),A2                         ; Recover A2
125        LDW         *+SP(32),A3                         ; Recover A3
126        LDW         *+SP(36),A4                         ; Recover A4
127        LDW         *+SP(40),A5                         ; Recover A5
128        LDW         *+SP(44),A6                         ; Recover A6
129        LDW         *+SP(48),A7                         ; Recover A7
130        LDW         *+SP(52),A8                         ; Recover A8
131        LDW         *+SP(56),A9                         ; Recover A9
132        MVC         B0,CSR                              ; Setup CSR
133        MVC         B1,IRP                              ; Setup IRP
134        MVC         B2,AMR                              ; Setup AMR
135        LDW         *+SP(268),B0                        ; Recover saved ILC
136        LDW         *+SP(272),B1                        ; Recover saved RILC
137        LDW         *+SP(276),B2                        ; Recover saved ITSR
138        NOP         4
139        MVC         B0,ILC                              ; Setup ILC
140        MVC         B1,RILC                             ; Setup RILC
141        MVC         B2,ITSR                             ; Setup ITSR
142        LDW         *+SP(84),B0                         ; Recover B0
143        LDW         *+SP(88),B1                         ; Recover B1
144        LDW         *+SP(92),B2                         ; Recover B2
145        LDW         *+SP(100),B4                        ; Recover B4
146        LDW         *+SP(104),B5                        ; Recover B5
147        LDW         *+SP(108),B6                        ; Recover B6
148        LDW         *+SP(112),B7                        ; Recover B7
149        LDW         *+SP(116),B8                        ; Recover B8
150        LDW         *+SP(140),A16                       ; Recover A16
151        LDW         *+SP(144),A17                       ; Recover A17
152        LDW         *+SP(148),A18                       ; Recover A18
153        LDW         *+SP(152),A19                       ; Recover A19
154        LDW         *+SP(156),A20                       ; Recover A20
155        LDW         *+SP(160),A21                       ; Recover A21
156        LDW         *+SP(164),A22                       ; Recover A22
157        LDW         *+SP(168),A23                       ; Recover A23
158        LDW         *+SP(172),A24                       ; Recover A24
159        LDW         *+SP(176),A25                       ; Recover A25
160        LDW         *+SP(180),A26                       ; Recover A26
161        LDW         *+SP(184),A27                       ; Recover A27
162        LDW         *+SP(188),A28                       ; Recover A28
163        LDW         *+SP(192),A29                       ; Recover A29
164        LDW         *+SP(196),A30                       ; Recover A30
165        LDW         *+SP(200),A31                       ; Recover A31
166        LDW         *+SP(204),B16                       ; Recover B16
167        LDW         *+SP(208),B17                       ; Recover B17
168        LDW         *+SP(212),B18                       ; Recover B18
169        LDW         *+SP(216),B19                       ; Recover B19
170        LDW         *+SP(220),B20                       ; Recover B20
171        LDW         *+SP(224),B21                       ; Recover B21
172        LDW         *+SP(228),B22                       ; Recover B22
173        LDW         *+SP(232),B23                       ; Recover B23
174        LDW         *+SP(236),B24                       ; Recover B24
175        LDW         *+SP(240),B25                       ; Recover B25
176        LDW         *+SP(244),B26                       ; Recover B26
177        LDW         *+SP(248),B27                       ; Recover B27
178        LDW         *+SP(252),B28                       ; Recover B28
179        LDW         *+SP(256),B29                       ; Recover B29
180        LDW         *+SP(260),B30                       ; Recover B30
181        LDW         *+SP(264),B31                       ; Recover B31
182        B           IRP                                 ; Return to point of interrupt
183||      LDW         *+SP(120),B9                        ; Recover B9
184        LDW         *+SP(96),B3                         ; Recover B3
185        ADDK.S2     288,SP                              ; Recover stack space
186        NOP         3                                   ; Delay slots
187;
188;    }
189_tx_thread_not_nested_restore:
190;
191;    /* Determine if a thread was interrupted and no preemption is required.  */
192;    else if (((_tx_thread_current_ptr) && (_tx_thread_current_ptr == _tx_thread_execute_ptr))
193;               || (_tx_thread_preempt_disable))
194;    {
195;
196        NOP                                             ; Delay
197        MV          A3,A1                               ; Move thread pointer into A1
198 [!A1]  B           _tx_thread_schedule                 ; If null, idle system restore
199        MVKL        _tx_thread_preempt_disable,A0       ; Build preempt disable flag address
200        MVKH        _tx_thread_preempt_disable,A0       ;
201        MVKL        _tx_thread_execute_ptr,A4           ; Build execute thread pointer
202        MVKH        _tx_thread_execute_ptr,A4           ;
203        LDW         *A0,B1                              ; Pickup preempt disable flag
204
205        LDW         *A4,A6                              ; Pickup next thread to execute
206        NOP         4                                   ; Delay slot
207        CMPEQ       A6,A1,A7                            ; Determine if threads are the same?
208        ADD         A7,B1,B1                            ; Add results together
209 [B1]   B           _tx_thread_no_preempt_restore       ; If set, skip preeemption
210        LDW         *+A1(8),A6                          ; Recover thread's stack pointer
211        MVKL        _tx_timer_time_slice,A5             ; Build time slice address
212        MVKH        _tx_timer_time_slice,A5             ;
213        LDW         *A5,B1                              ; Pickup current time-slice
214        NOP                                             ; Delay slot
215;
216;
217_tx_thread_preempt_restore:
218;
219;
220        MVKL        1,A0                                ; Build the interrupt stack type
221        STW         A0,*+A6(4)                          ; Save stack type
222;
223;   /* Store the remaining registers on the thread's stack.  */
224;
225        STW         A10,*+A6(60)                        ; Save A10
226        STW         A11,*+A6(64)                        ; Save A11
227        STW         A12,*+A6(68)                        ; Save A12
228        STW         A13,*+A6(72)                        ; Save A13
229        STW         A14,*+A6(76)                        ; Save A14
230        STW         A15,*+A6(80)                        ; Save A15 (FP)
231        STW         B10,*+A6(124)                       ; Save B10
232        ADDK        128,A6                              ; Move stack pointer
233        STW         B11,*+A6(0)                         ; Save B11
234        STW         B12,*+A6(4)                         ; Save B12
235        STW         B13,*+A6(8)                         ; Save B13
236;
237;    /* Save the remaining time-slice and disable it.  */
238;    if (_tx_timer_time_slice)
239;    {
240;
241;        _tx_thread_current_ptr -> tx_thread_time_slice =  _tx_timer_time_slice;
242;        _tx_timer_time_slice =  0;
243;
244;    }
245_tx_thread_dont_save_ts:
246;
247;
248;    /* Clear the current task pointer.  */
249;    _tx_thread_current_ptr =  TX_NULL;
250;
251;    /* Return to the scheduler.  */
252;    _tx_thread_schedule();
253;
254        B           _tx_thread_schedule                 ; Return to scheduler
255        STW         B1,*+A1(24)                         ; Store current time-slice
256        ZERO        A3                                  ; Clear value
257        STW         A3,*A2                              ; Set current thread pointer to NULL
258        STW         A3,*A5                              ; Set time slice to 0
259        NOP                                             ; Delay
260;
261;
262_tx_thread_no_preempt_restore:
263;
264;    /* Restore interrupted thread.  */
265;
266;    /* Pickup the saved stack pointer.  */
267;    SP =  _tx_thread_current_ptr -> tx_thread_stack_ptr;
268;
269;   /* Recover the saved context and return to the point of interrupt.  */
270;
271        MV          A6,SP                               ; Setup real stack pointer
272        LDW         *+SP(8),B0                          ; Recover saved CSR
273        LDW         *+SP(12),B1                         ; Recover saved IRP
274        LDW         *+SP(16),B2                         ; Recover saved AMR
275        LDW         *+SP(20),A0                         ; Recover A0
276        LDW         *+SP(24),A1                         ; Recover A1
277        LDW         *+SP(28),A2                         ; Recover A2
278        LDW         *+SP(32),A3                         ; Recover A3
279        LDW         *+SP(36),A4                         ; Recover A4
280        LDW         *+SP(40),A5                         ; Recover A5
281        LDW         *+SP(44),A6                         ; Recover A6
282        LDW         *+SP(48),A7                         ; Recover A7
283        LDW         *+SP(52),A8                         ; Recover A8
284        LDW         *+SP(56),A9                         ; Recover A9
285        MVC         B0,CSR                              ; Setup CSR
286        MVC         B1,IRP                              ; Setup IRP
287        MVC         B2,AMR                              ; Setup AMR
288        LDW         *+SP(268),B0                        ; Recover saved ILC
289        LDW         *+SP(272),B1                        ; Recover saved RILC
290        LDW         *+SP(276),B2                        ; Recover saved ITSR
291        NOP         4                                   ; Delay
292        MVC         B0,ILC                              ; Setup ILC
293        MVC         B1,RILC                             ; Setup RILC
294        MVC         B2,ITSR                             ; Setup ITSR
295        LDW         *+SP(84),B0                         ; Recover B0
296        LDW         *+SP(88),B1                         ; Recover B1
297        LDW         *+SP(92),B2                         ; Recover B2
298        LDW         *+SP(100),B4                        ; Recover B4
299        LDW         *+SP(104),B5                        ; Recover B5
300        LDW         *+SP(108),B6                        ; Recover B6
301        LDW         *+SP(112),B7                        ; Recover B7
302        LDW         *+SP(116),B8                        ; Recover B8
303        LDW         *+SP(140),A16                       ; Recover A16
304        LDW         *+SP(144),A17                       ; Recover A17
305        LDW         *+SP(148),A18                       ; Recover A18
306        LDW         *+SP(152),A19                       ; Recover A19
307        LDW         *+SP(156),A20                       ; Recover A20
308        LDW         *+SP(160),A21                       ; Recover A21
309        LDW         *+SP(164),A22                       ; Recover A22
310        LDW         *+SP(168),A23                       ; Recover A23
311        LDW         *+SP(172),A24                       ; Recover A24
312        LDW         *+SP(176),A25                       ; Recover A25
313        LDW         *+SP(180),A26                       ; Recover A26
314        LDW         *+SP(184),A27                       ; Recover A27
315        LDW         *+SP(188),A28                       ; Recover A28
316        LDW         *+SP(192),A29                       ; Recover A29
317        LDW         *+SP(196),A30                       ; Recover A30
318        LDW         *+SP(200),A31                       ; Recover A31
319        LDW         *+SP(204),B16                       ; Recover B16
320        LDW         *+SP(208),B17                       ; Recover B17
321        LDW         *+SP(212),B18                       ; Recover B18
322        LDW         *+SP(216),B19                       ; Recover B19
323        LDW         *+SP(220),B20                       ; Recover B20
324        LDW         *+SP(224),B21                       ; Recover B21
325        LDW         *+SP(228),B22                       ; Recover B22
326        LDW         *+SP(232),B23                       ; Recover B23
327        LDW         *+SP(236),B24                       ; Recover B24
328        LDW         *+SP(240),B25                       ; Recover B25
329        LDW         *+SP(244),B26                       ; Recover B26
330        LDW         *+SP(248),B27                       ; Recover B27
331        LDW         *+SP(252),B28                       ; Recover B28
332        LDW         *+SP(256),B29                       ; Recover B29
333        LDW         *+SP(260),B30                       ; Recover B30
334        LDW         *+SP(264),B31                       ; Recover B31
335        B           IRP                                 ; Return to point of interrupt
336||      LDW         *+SP(120),B9                        ; Recover B9
337        LDW         *+SP(96),B3                         ; Recover B3
338        ADDK.S2     288,SP                              ; Recover stack space
339        NOP         3                                   ; Delay slots
340;
341;    }
342;}
343
344