1@/**************************************************************************/ 2@/* */ 3@/* Copyright (c) Microsoft Corporation. All rights reserved. */ 4@/* */ 5@/* This software is licensed under the Microsoft Software License */ 6@/* Terms for Microsoft Azure RTOS. Full text of the license can be */ 7@/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ 8@/* and in the root directory of this software. */ 9@/* */ 10@/**************************************************************************/ 11@ 12@ 13@/**************************************************************************/ 14@/**************************************************************************/ 15@/** */ 16@/** ThreadX Component */ 17@/** */ 18@/** Thread */ 19@/** */ 20@/**************************************************************************/ 21@/**************************************************************************/ 22#ifdef TX_INCLUDE_USER_DEFINE_FILE 23#include "tx_user.h" 24#endif 25 26#ifdef TX_ENABLE_FIQ_SUPPORT 27ENABLE_INTS = 0xC0 @ IRQ & FIQ Interrupts enabled mask 28#else 29ENABLE_INTS = 0x80 @ IRQ Interrupts enabled mask 30#endif 31@ 32@ 33 .global _tx_thread_execute_ptr 34 .global _tx_thread_current_ptr 35 .global _tx_timer_time_slice 36 .global _tx_execution_thread_enter 37@ 38@ 39@/* Define the 16-bit Thumb mode veneer for _tx_thread_schedule for 40@ applications calling this function from to 16-bit Thumb mode. */ 41@ 42 .text 43 .align 2 44 .global $_tx_thread_schedule 45 .type $_tx_thread_schedule,function 46$_tx_thread_schedule: 47 .thumb 48 BX pc @ Switch to 32-bit mode 49 NOP @ 50 .arm 51 STMFD sp!, {lr} @ Save return address 52 BL _tx_thread_schedule @ Call _tx_thread_schedule function 53 LDMFD sp!, {lr} @ Recover saved return address 54 BX lr @ Return to 16-bit caller 55@ 56@ 57 .text 58 .align 2 59@/**************************************************************************/ 60@/* */ 61@/* FUNCTION RELEASE */ 62@/* */ 63@/* _tx_thread_schedule ARM9/GNU */ 64@/* 6.2.1 */ 65@/* AUTHOR */ 66@/* */ 67@/* William E. Lamie, Microsoft Corporation */ 68@/* */ 69@/* DESCRIPTION */ 70@/* */ 71@/* This function waits for a thread control block pointer to appear in */ 72@/* the _tx_thread_execute_ptr variable. Once a thread pointer appears */ 73@/* in the variable, the corresponding thread is resumed. */ 74@/* */ 75@/* INPUT */ 76@/* */ 77@/* None */ 78@/* */ 79@/* OUTPUT */ 80@/* */ 81@/* None */ 82@/* */ 83@/* CALLS */ 84@/* */ 85@/* None */ 86@/* */ 87@/* CALLED BY */ 88@/* */ 89@/* _tx_initialize_kernel_enter ThreadX entry function */ 90@/* _tx_thread_system_return Return to system from thread */ 91@/* _tx_thread_context_restore Restore thread's context */ 92@/* */ 93@/* RELEASE HISTORY */ 94@/* */ 95@/* DATE NAME DESCRIPTION */ 96@/* */ 97@/* 09-30-2020 William E. Lamie Initial Version 6.1 */ 98@/* 03-08-2023 Cindy Deng Modified comment(s), added */ 99@/* #include tx_user.h, */ 100@/* resulting in version 6.2.1 */ 101@/* */ 102@/**************************************************************************/ 103@VOID _tx_thread_schedule(VOID) 104@{ 105 .global _tx_thread_schedule 106 .type _tx_thread_schedule,function 107_tx_thread_schedule: 108@ 109@ /* Enable interrupts. */ 110@ 111 MRS r2, CPSR @ Pickup CPSR 112 BIC r0, r2, #ENABLE_INTS @ Clear the disable bit(s) 113 MSR CPSR_cxsf, r0 @ Enable interrupts 114@ 115@ /* Wait for a thread to execute. */ 116@ do 117@ { 118 LDR r1, =_tx_thread_execute_ptr @ Address of thread execute ptr 119@ 120__tx_thread_schedule_loop: 121@ 122 LDR r0, [r1] @ Pickup next thread to execute 123 CMP r0, #0 @ Is it NULL? 124 BEQ __tx_thread_schedule_loop @ If so, keep looking for a thread 125@ 126@ } 127@ while(_tx_thread_execute_ptr == TX_NULL); 128@ 129@ /* Yes! We have a thread to execute. Lockout interrupts and 130@ transfer control to it. */ 131@ 132 MSR CPSR_cxsf, r2 @ Disable interrupts 133@ 134@ /* Setup the current thread pointer. */ 135@ _tx_thread_current_ptr = _tx_thread_execute_ptr; 136@ 137 LDR r1, =_tx_thread_current_ptr @ Pickup address of current thread 138 STR r0, [r1] @ Setup current thread pointer 139@ 140@ /* Increment the run count for this thread. */ 141@ _tx_thread_current_ptr -> tx_thread_run_count++; 142@ 143 LDR r2, [r0, #4] @ Pickup run counter 144 LDR r3, [r0, #24] @ Pickup time-slice for this thread 145 ADD r2, r2, #1 @ Increment thread run-counter 146 STR r2, [r0, #4] @ Store the new run counter 147@ 148@ /* Setup time-slice, if present. */ 149@ _tx_timer_time_slice = _tx_thread_current_ptr -> tx_thread_time_slice; 150@ 151 LDR r2, =_tx_timer_time_slice @ Pickup address of time-slice 152 @ variable 153 LDR sp, [r0, #8] @ Switch stack pointers 154 STR r3, [r2] @ Setup time-slice 155@ 156@ /* Switch to the thread's stack. */ 157@ sp = _tx_thread_execute_ptr -> tx_thread_stack_ptr; 158@ 159#ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY 160@ 161@ /* Call the thread entry function to indicate the thread is executing. */ 162@ 163 BL _tx_execution_thread_enter @ Call the thread execution enter function 164#endif 165@ 166@ /* Determine if an interrupt frame or a synchronous task suspension frame 167@ is present. */ 168@ 169 LDMIA sp!, {r0, r1} @ Pickup the stack type and saved CPSR 170 CMP r0, #0 @ Check for synchronous context switch 171 MSRNE SPSR_cxsf, r1 @ Setup SPSR for return 172 LDMNEIA sp!, {r0-r12, lr, pc}^ @ Return to point of thread interrupt 173 LDMIA sp!, {r4-r11, lr} @ Return to thread synchronously 174 MSR CPSR_cxsf, r1 @ Recover CPSR 175#ifdef __THUMB_INTERWORK 176 BX lr @ Return to caller 177#else 178 MOV pc, lr @ Return to caller 179#endif 180@ 181@} 182@ 183 184
