1@/**************************************************************************/
2@/*                                                                        */
3@/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
4@/*                                                                        */
5@/*       This software is licensed under the Microsoft Software License   */
6@/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
7@/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
8@/*       and in the root directory of this software.                      */
9@/*                                                                        */
10@/**************************************************************************/
11@
12@
13@/**************************************************************************/
14@/**************************************************************************/
15@/**                                                                       */
16@/** ThreadX Component                                                     */
17@/**                                                                       */
18@/**   Thread                                                              */
19@/**                                                                       */
20@/**************************************************************************/
21@/**************************************************************************/
22#ifdef TX_INCLUDE_USER_DEFINE_FILE
23#include "tx_user.h"
24#endif
25
26#ifdef TX_ENABLE_FIQ_SUPPORT
27DISABLE_INTS    =           0xC0                @ IRQ & FIQ interrupts disabled
28#else
29DISABLE_INTS    =           0x80                @ IRQ interrupts disabled
30#endif
31@
32@
33@/* Define the 16-bit Thumb mode veneer for _tx_thread_interrupt_disable for
34@   applications calling this function from to 16-bit Thumb mode.  */
35@
36    .text
37    .align 2
38    .global $_tx_thread_interrupt_disable
39$_tx_thread_interrupt_disable:
40        .thumb
41     BX        pc                               @ Switch to 32-bit mode
42     NOP                                        @
43    .arm
44     STMFD     sp!, {lr}                        @ Save return address
45     BL        _tx_thread_interrupt_disable     @ Call _tx_thread_interrupt_disable function
46     LDMFD     sp!, {lr}                        @ Recover saved return address
47     BX        lr                               @ Return to 16-bit caller
48@
49@
50    .text
51    .align 2
52@/**************************************************************************/
53@/*                                                                        */
54@/*  FUNCTION                                               RELEASE        */
55@/*                                                                        */
56@/*    _tx_thread_interrupt_disable                         ARM9/GNU       */
57@/*                                                           6.2.1        */
58@/*  AUTHOR                                                                */
59@/*                                                                        */
60@/*    William E. Lamie, Microsoft Corporation                             */
61@/*                                                                        */
62@/*  DESCRIPTION                                                           */
63@/*                                                                        */
64@/*    This function is responsible for disabling interrupts               */
65@/*                                                                        */
66@/*  INPUT                                                                 */
67@/*                                                                        */
68@/*    None                                                                */
69@/*                                                                        */
70@/*  OUTPUT                                                                */
71@/*                                                                        */
72@/*    old_posture                           Old interrupt lockout posture */
73@/*                                                                        */
74@/*  CALLS                                                                 */
75@/*                                                                        */
76@/*    None                                                                */
77@/*                                                                        */
78@/*  CALLED BY                                                             */
79@/*                                                                        */
80@/*    Application Code                                                    */
81@/*                                                                        */
82@/*  RELEASE HISTORY                                                       */
83@/*                                                                        */
84@/*    DATE              NAME                      DESCRIPTION             */
85@/*                                                                        */
86@/*  09-30-2020     William E. Lamie         Initial Version 6.1           */
87@/*  03-08-2023     Cindy Deng               Modified comment(s), added    */
88@/*                                            #include tx_user.h,         */
89@/*                                            resulting in version 6.2.1  */
90@/*                                                                        */
91@/**************************************************************************/
92@UINT   _tx_thread_interrupt_disable(void)
93@{
94    .global _tx_thread_interrupt_disable
95    .type   _tx_thread_interrupt_disable,function
96_tx_thread_interrupt_disable:
97@
98@    /* Pickup current interrupt lockout posture.  */
99@
100    MRS     r0, CPSR                            @ Pickup current CPSR
101@
102@    /* Mask interrupts.  */
103@
104    ORR     r1, r0, #DISABLE_INTS               @ Mask interrupts
105    MSR     CPSR_cxsf, r1                       @ Setup new CPSR
106#ifdef __THUMB_INTERWORK
107    BX      lr                                  @ Return to caller
108#else
109    MOV     pc, lr                              @ Return to caller
110#endif
111@}
112
113
114