1;/**************************************************************************/ 2;/* */ 3;/* Copyright (c) Microsoft Corporation. All rights reserved. */ 4;/* */ 5;/* This software is licensed under the Microsoft Software License */ 6;/* Terms for Microsoft Azure RTOS. Full text of the license can be */ 7;/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ 8;/* and in the root directory of this software. */ 9;/* */ 10;/**************************************************************************/ 11 12;/**************************************************************************/ 13;/**************************************************************************/ 14;/** */ 15;/** ThreadX Component */ 16;/** */ 17;/** Thread */ 18;/** */ 19;/**************************************************************************/ 20;/**************************************************************************/ 21#ifdef TX_INCLUDE_USER_DEFINE_FILE 22#include "tx_user.h" 23#endif 24 25 .equ LONG_ALIGN_MASK, 0xFFFFFFFC 26 .equ INT_ENABLE_BITS, 0x8000001E 27 28;/**************************************************************************/ 29;/* */ 30;/* FUNCTION RELEASE */ 31;/* */ 32;/* _tx_thread_stack_build ARCv2_EM/MetaWare */ 33;/* 6.2.1 */ 34;/* AUTHOR */ 35;/* */ 36;/* William E. Lamie, Microsoft Corporation */ 37;/* */ 38;/* DESCRIPTION */ 39;/* */ 40;/* This function builds a stack frame on the supplied thread's stack. */ 41;/* The stack frame results in a fake interrupt return to the supplied */ 42;/* function pointer. */ 43;/* */ 44;/* INPUT */ 45;/* */ 46;/* thread_ptr Pointer to thread control blk */ 47;/* function_ptr Pointer to return function */ 48;/* */ 49;/* OUTPUT */ 50;/* */ 51;/* None */ 52;/* */ 53;/* CALLS */ 54;/* */ 55;/* None */ 56;/* */ 57;/* CALLED BY */ 58;/* */ 59;/* _tx_thread_create Create thread service */ 60;/* */ 61;/* RELEASE HISTORY */ 62;/* */ 63;/* DATE NAME DESCRIPTION */ 64;/* */ 65;/* 09-30-2020 William E. Lamie Initial Version 6.1 */ 66;/* 04-02-2021 Andres Mlinar Modified comments, */ 67;/* resulting in version 6.1.6 */ 68;/* 03-08-2023 Cindy Deng Modified comment(s), added */ 69;/* #include tx_user.h, */ 70;/* resulting in version 6.2.1 */ 71;/* */ 72;/**************************************************************************/ 73;VOID _tx_thread_stack_build(TX_THREAD *thread_ptr, VOID (*function_ptr)(VOID)) 74;{ 75 .global _tx_thread_stack_build 76 .type _tx_thread_stack_build, @function 77_tx_thread_stack_build: 78; 79; 80; /* Build a fake interrupt frame. The form of the fake interrupt stack 81; on the ARCv2 EM should look like the following after it is built. 82; Note that the extension registers are always assigned space here. 83; 84; Stack Top: 1 Interrupt stack frame type 85; LP_START Initial loop start 86; LP_END Initial loop end 87; LP_COUNT Initial loop count 88; blink Initial blink value 89; ilink Initial ilink (point of interrupt) 90; fp (r27) Initial fp (0) 91; gp Initial gp 92; r25 Initial r25 93; r24 Initial r24 94; r23 Initial r23 95; r22 Initial r22 96; r21 Initial r21 97; r20 Initial r20 98; r19 Initial r19 99; r18 Initial r18 100; r17 Initial r17 101; r16 Initial r16 102; r15 Initial r15 103; r14 Initial r14 104; r13 Initial r13 105; r12 Initial r12 106; r11 Initial r11 107; r10 Initial r10 108; r9 Initial r9 109; r8 Initial r8 110; r7 Initial r7 111; r6 Initial r6 112; r5 Initial r5 113; r4 Initial r4 114; r3 Initial r3 115; r2 Initial r2 116; r1 Initial r1 117; r0 Initial r0 118; r30 Initial r30 119; r58 Initial r58 120; r59 Initial r59 121; 0 Reserved 122; 0 Reserved 123; 0 Initial BTA 124; 0 Point of Interrupt (thread entry point) 125; 0 Initial STATUS32 126; 0 Backtrace 127; 0 Backtrace 128; 0 Backtrace 129; 0 Backtrace 130; 131; *: these registers will only be saved and restored if flag -Xxmac_d16 is passed to hcac 132; 133; Stack Bottom: (higher memory address) */ 134; 135 ld r3, [r0, 16] ; Pickup end of stack area 136 and r3, r3, LONG_ALIGN_MASK ; Ensure long-word alignment 137 sub r3, r3, 196 ; Allocate an interrupt stack frame (ARCv2 EM) 138; 139; /* Actually build the stack frame. */ 140; 141 st 1, [r3, 0] ; Store interrupt stack type on the 142 ; top of the stack 143 mov r5, 0 ; Build initial clear value 144 st r5, [r3, 4] ; Store initial LP_START 145 st r5, [r3, 8] ; Store initial LP_END 146 st r5, [r3, 12] ; Store initial LP_COUNT 147 st r5, [r3, 16] ; Store initial blink 148 st r1, [r3, 20] ; Store initial ilink 149 st r5, [r3, 24] ; Store initial fp (0 for backtrace) 150 st gp, [r3, 28] ; Store current gp 151 st r5, [r3, 32] ; Store initial r25 152 st r5, [r3, 36] ; Store initial r24 153 st r5, [r3, 40] ; Store initial r23 154 st r5, [r3, 44] ; Store initial r22 155 st r5, [r3, 48] ; Store initial r21 156 st r5, [r3, 52] ; Store initial r20 157 st r5, [r3, 56] ; Store initial r19 158 st r5, [r3, 60] ; Store initial r18 159 st r5, [r3, 64] ; Store initial r17 160 st r5, [r3, 68] ; Store initial r16 161 st r5, [r3, 72] ; Store initial r15 162 st r5, [r3, 76] ; Store initial r14 163 st r5, [r3, 80] ; Store initial r13 164 st r5, [r3, 84] ; Store initial r12 165 st r5, [r3, 88] ; Store initial r11 166 st r5, [r3, 92] ; Store initial r10 167 st r5, [r3, 96] ; Store initial r9 168 st r5, [r3, 100] ; Store initial r8 169 st r5, [r3, 104] ; Store initial r7 170 st r5, [r3, 108] ; Store initial r6 171 st r5, [r3, 112] ; Store initial r5 172 st r5, [r3, 116] ; Store initial r4 173 st r5, [r3, 120] ; Store initial r3 174 st r5, [r3, 124] ; Store initial r2 175 st r5, [r3, 128] ; Store initial r1 176 st r5, [r3, 132] ; Store initial r0 177 st r5, [r3, 136] ; Store initial r30 178 st r5, [r3, 140] ; Store initial r58 179 st r5, [r3, 144] ; Store initial r59 180 st r5, [r3, 148] ; Reserved 181 st r5, [r3, 152] ; Reserved 182 st r5, [r3, 156] ; Store initial BTA 183 st r1, [r3, 160] ; Store initial point of entry 184 lr r6, [status32] ; Pickup STATUS32 185 or r6, r6, INT_ENABLE_BITS ; Make sure interrupts are enabled 186 st r6, [r3, 164] ; Store initial STATUS32 187 st r5, [r3, 168] ; Backtrace 0 188 st r5, [r3, 172] ; Backtrace 0 189 st r5, [r3, 176] ; Backtrace 0 190 st r5, [r3, 180] ; Backtrace 0 191; 192; /* Setup stack pointer. */ 193; thread_ptr -> tx_thread_stack_ptr = r3; 194; 195 j_s.d [blink] ; Return to caller 196 st r3, [r0, 8] ; Save stack pointer in thread's 197 ; control block 198;} 199 .end 200 201 202