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| /ThreadX-v6.4.1/ports/cortex_m3/ac6/example_build/sample_threadx/ |
| D | sample_threadx.scat | 18 ; System Control Space registers appear at their architecturally-defined addresses, based at 0xE000…
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| /ThreadX-v6.4.1/ports/cortex_m0/ac6/example_build/sample_threadx/ |
| D | sample_threadx.scat | 18 ; System Control Space registers appear at their architecturally-defined addresses, based at 0xE000…
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| /ThreadX-v6.4.1/ports_module/cortex_m7/ac6/example_build/sample_threadx/ |
| D | sample_threadx.scat | 16 ; System Control Space registers appear at their architecturally-defined addresses, based at 0xE000…
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| /ThreadX-v6.4.1/ports_module/cortex_m7/ac6/example_build/sample_threadx_module_manager/ |
| D | sample_threadx.scat | 16 ; System Control Space registers appear at their architecturally-defined addresses, based at 0xE000…
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| /ThreadX-v6.4.1/ports/cortex_m4/ac6/example_build/sample_threadx/ |
| D | sample_threadx.scat | 16 ; System Control Space registers appear at their architecturally-defined addresses, based at 0xE000…
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| /ThreadX-v6.4.1/ports/cortex_m7/ac6/example_build/sample_threadx/ |
| D | sample_threadx.scat | 16 ; System Control Space registers appear at their architecturally-defined addresses, based at 0xE000…
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| /ThreadX-v6.4.1/ports_module/cortex_m4/ac6/example_build/sample_threadx/ |
| D | sample_threadx.scat | 16 ; System Control Space registers appear at their architecturally-defined addresses, based at 0xE000…
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| /ThreadX-v6.4.1/ports_module/cortex_m4/ac6/example_build/sample_threadx_module_manager/ |
| D | sample_threadx.scat | 16 ; System Control Space registers appear at their architecturally-defined addresses, based at 0xE000…
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| /ThreadX-v6.4.1/ports_module/cortex_m0+/ac6/example_build/sample_threadx/ |
| D | sample_threadx.scat | 16 ; System Control Space registers appear at their architecturally-defined addresses, based at 0xE000…
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| /ThreadX-v6.4.1/ports_module/cortex_m0+/ac6/example_build/sample_threadx_module_manager/ |
| D | sample_threadx.scat | 16 ; System Control Space registers appear at their architecturally-defined addresses, based at 0xE000…
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| /ThreadX-v6.4.1/ports_module/cortex_m3/ac6/example_build/sample_threadx_module_manager/ |
| D | sample_threadx.scat | 16 ; System Control Space registers appear at their architecturally-defined addresses, based at 0xE000…
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| /ThreadX-v6.4.1/ports_module/cortex_m3/ac6/example_build/sample_threadx/ |
| D | sample_threadx.scat | 16 ; System Control Space registers appear at their architecturally-defined addresses, based at 0xE000…
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| /ThreadX-v6.4.1/ports_smp/mips32_interaptiv_smp/green/example_build/ |
| D | release_mp.mip | 65 // Send PwrUp command to next core causing execution at their reset exception vector.
78 // Release next core to execute at their reset exception vector.
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| D | init_cm.mip | 61 // Allow each core access to the CM registers (they should only access their local registers.)
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| /ThreadX-v6.4.1/ports/win32/vs_2019/ |
| D | readme_threadx.txt | 63 Win32 implementation must have some ThreadX call periodically in their
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| /ThreadX-v6.4.1/ports_smp/cortex_a7_smp/gnu/ |
| D | readme_threadx.txt | 326 Note that if ISRs need to use VFP registers, their contents much be saved
327 before their use and restored after.
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| /ThreadX-v6.4.1/ports_smp/cortex_a5_smp/gnu/ |
| D | readme_threadx.txt | 326 Note that if ISRs need to use VFP registers, their contents much be saved
327 before their use and restored after.
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| /ThreadX-v6.4.1/ |
| D | README.md | 167 The main components of ThreadX RTOS are each provided in their own repository, but there are depend…
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| /ThreadX-v6.4.1/ports_smp/mips32_interaptiv_smp/gnu/ |
| D | readme_threadx.txt | 221 suspend themselves, or may exit the system upon completion of their work. Protection
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| /ThreadX-v6.4.1/ports_smp/mips32_interaptiv_smp/green/ |
| D | readme_threadx.txt | 262 suspend themselves, or may exit the system upon completion of their work. Protection
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| /ThreadX-v6.4.1/ports/cortex_a8/ac6/ |
| D | readme_threadx.txt | 23 the demonstration; users are expected to run the demonstration on their platform
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| /ThreadX-v6.4.1/utility/low_power/ |
| D | low_power.md | 32 …x-M and RX ports have calls to the low power APIs already integrated into their schedulers. If sym…
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| /ThreadX-v6.4.1/ports/cortex_r4/ghs/ |
| D | readme_threadx.txt | 78 The following defines and their associated action are as follows:
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| /ThreadX-v6.4.1/ports/xtensa/xcc/ |
| D | readme_threadx.txt | 331 their names begin with "TX_". Defines below are unique to the Xtensa
687 in the windowed register file to their pre-determined locations
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| /ThreadX-v6.4.1/ports/cortex_a9/ghs/ |
| D | readme_threadx.txt | 78 The following defines and their associated action are as follows:
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