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/ThreadX-v6.4.1/ports/arc_hs/metaware/src/
Dtx_initialize_fast_interrupt_setup.s83 … r2, r1, 16 ; Move the register bank bits over to proper location
Dtx_thread_register_bank_assign.s85 … r2, r1, 16 ; Move the register bank bits over to proper location
/ThreadX-v6.4.1/ports_smp/mips32_interaptiv_smp/gnu/src/
Dtx_initialize_low_level.S197 sll $8, $8, 2 # Build offset to proper counter index
/ThreadX-v6.4.1/ports_smp/mips32_interaptiv_smp/green/src/
Dtx_initialize_low_level.mip144 the proper place and use registers in accordance with the MIPS compiler, i.e.
197 sll $8, $8, 2 # Build offset to proper counter index
/ThreadX-v6.4.1/ports_smp/cortex_a5x_smp/green/src/
Dtx_thread_context_save.a6481 out, x29 (frame pointer), x30 (link register) are saved, we are in the proper EL,
/ThreadX-v6.4.1/docs/
Drevision_history.txt1483 … tx_timer_info_get.c Added check for proper remaining time calculation.