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| /ThreadX-v6.4.1/ports_smp/mips32_interaptiv_smp/green/example_build/ |
| D | init_cp0.mip | 36 party. This code constitutes one or more of the following: commercial computer software,
71 bgez v0, done_wr // Check for bit 31 (sign bit) for more Watch registers
76 bgez v0, done_wr // Check for bit 31 (sign bit) for more Watch registers
81 bgez v0, done_wr // Check for bit 31 (sign bit) for more Watch registers
86 bgez v0, done_wr // Check for bit 31 (sign bit) for more Watch registers
91 bgez v0, done_wr // Check for bit 31 (sign bit) for more Watch registers
96 bgez v0, done_wr // Check for bit 31 (sign bit) for more Watch registers
101 bgez v0, done_wr // Check for bit 31 (sign bit) for more Watch registers
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| D | release_mp.mip | 36 party. This code constitutes one or more of the following: commercial computer software,
58 blez r19_more_cores, done_release_mp // If no more cores then we are done.
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| D | init_vpe1.mip | 36 party. This code constitutes one or more of the following: commercial computer software,
117 // in a system with more than 1 VPE and TCs each
184 bnez v1, donevpe // No more VPE's
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| D | init_itc.mip | 36 party. This code constitutes one or more of the following: commercial computer software,
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| D | init_CoreFPGA6_mem.mip | 35 party. This code constitutes one or more of the following: commercial computer software,
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| /ThreadX-v6.4.1/ports_arch/ARMv8-M/ |
| D | README.md | 4 To make work more efficient these files are internally tracked only once and copied over to specifi…
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| /ThreadX-v6.4.1/ports_arch/ARMv7-A/ |
| D | README.md | 4 To make work more efficient these files are internally tracked only once and copied over to specifi…
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| /ThreadX-v6.4.1/ports_arch/ARMv7-M/ |
| D | README.md | 4 To make work more efficient these files are internally tracked only once and copied over to specifi…
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| /ThreadX-v6.4.1/ports_arch/ARMv8-A/ |
| D | README.md | 3 …eadX SMP Modules ports for ARMv8 share many files in common. To make work more efficient these fil…
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| /ThreadX-v6.4.1/ |
| D | SECURITY.md | 16 You can find more information about reporting and disclosure at the [Eclipse Foundation Security pa…
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| D | CONTRIBUTING.md | 28 Information regarding source code management, builds, coding standards, and more.
66 For more information, please see the Eclipse Committer Handbook:
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| /ThreadX-v6.4.1/ports_smp/cortex_a5x_smp/green/example_build/tgt/ |
| D | resource_readme.txt | 24 For more information about board setup files and connection files, see the
60 For more information about linker directives files, see the "MULTI: Building
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| /ThreadX-v6.4.1/ports/arc_hs/metaware/src/ |
| D | tx_thread_context_fast_restore.s | 124 …brne.d r4, r5, __tx_thread_no_preempt_restore ; If more interrupts, just return to the point…
291 …bne __tx_thread_nested_restore ; If more interrupts, just return to the point…
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| /ThreadX-v6.4.1/test/ports/ |
| D | README.md | 20 * Testing one or more ports
22 * Verifying that examples one or more ports during development
119 For more examples look at the help embedded in the script.
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| /ThreadX-v6.4.1/ports/xtensa/xcc/ |
| D | readme_threadx.txt | 112 There are more details about build options in the comment in the Makefile.
236 levels. If the application uses more complex handlers, it will be
337 of periodic tick to provide a more acceptable
356 Default for simulator provides more acceptable
370 provides more than one suitable timer and you
390 describing the interrupt stack for more details.
400 choice of ABI. See Xtensa documentation for more details.
422 The Call0 ABI is more conventional and uses registers as follows:
503 NOTE: The material in this section is mostly an overview. For a more
529 See the files xtensa_vectors.S and xtensa_api.h for more details of how
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| /ThreadX-v6.4.1/ports/cortex_a9/iar/example_build/ |
| D | cstartup.s | 146 ; Add more initialization here
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| /ThreadX-v6.4.1/ports_module/cortex_a7/iar/example_build/ |
| D | cstartup.s | 146 ; Add more initialization here
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| /ThreadX-v6.4.1/ports_arch/ARMv7-A/threadx/ports/iar/example_build/ |
| D | cstartup.s | 146 ; Add more initialization here
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| /ThreadX-v6.4.1/ports/arm11/iar/example_build/ |
| D | cstartup.s | 151 ; Add more initialization here
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| /ThreadX-v6.4.1/ports/arm9/iar/example_build/ |
| D | cstartup.s | 151 ; Add more initialization here
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| /ThreadX-v6.4.1/ports/cortex_a15/iar/example_build/ |
| D | cstartup.s | 146 ; Add more initialization here
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| /ThreadX-v6.4.1/ports/cortex_a8/iar/example_build/ |
| D | cstartup.s | 151 ; Add more initialization here
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| /ThreadX-v6.4.1/ports/cortex_a5/iar/example_build/ |
| D | cstartup.s | 146 ; Add more initialization here
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| /ThreadX-v6.4.1/ports/cortex_a7/iar/example_build/ |
| D | cstartup.s | 146 ; Add more initialization here
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| /ThreadX-v6.4.1/ports_smp/arc_hs_smp/metaware/example_build/sample_threadx/ |
| D | crt1cl.s | 80 ; Note: this is setup for 2 cores and needs to be augmented if more than 2 cores
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