| /ThreadX-v6.4.1/ports/cortex_m7/ghs/example_build/ |
| D | tx_initialize_low_level.arm | 122 ; Note: SVC must be lowest priority, which is 0xFF
126 ; Note: PnSV must be lowest priority, which is 0xFF
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| /ThreadX-v6.4.1/ports/rxv1/ccrx/src/ |
| D | tx_thread_schedule.src | 184 ; The priority of this interrupt is set to the lowest priority within
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| D | tx_initialize_low_level.src | 89 ; /* Set priority of SWINT to 1. */
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| /ThreadX-v6.4.1/ports/rxv2/ccrx/src/ |
| D | tx_thread_schedule.src | 191 ; The priority of this interrupt is set to the lowest priority within
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| D | tx_initialize_low_level.src | 89 ; /* Set priority of SWINT to 1. */
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| /ThreadX-v6.4.1/ports/cortex_m4/ghs/example_build/ |
| D | tx_initialize_low_level.arm | 122 ; Note: SVC must be lowest priority, which is 0xFF
126 ; Note: PnSV must be lowest priority, which is 0xFF
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| /ThreadX-v6.4.1/ports_arch/ARMv7-M/threadx/ghs/example_build/ |
| D | tx_initialize_low_level.arm | 122 ; Note: SVC must be lowest priority, which is 0xFF
126 ; Note: PnSV must be lowest priority, which is 0xFF
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| /ThreadX-v6.4.1/ports/rxv1/iar/src/ |
| D | tx_thread_context_restore.s | 185 MVTC #0, PSW ; Reset interrupt priority level to 0
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| /ThreadX-v6.4.1/ports/rxv3/ccrx/src/ |
| D | tx_initialize_low_level.src | 89 ; /* Set priority of SWINT to 1. */
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| D | tx_thread_schedule.src | 201 ; The priority of this interrupt is set to the lowest priority within
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| /ThreadX-v6.4.1/ports/arc_em/metaware/ |
| D | readme_threadx.txt | 167 should be higher priority than all ThreadX-managed ISRs.
178 timer 0, which generates low priority interrupts on interrupt vector 16.
179 It is easy to change the timer interrupt source and priority by changing the
218 tx_thread_schedule.s fixed interrupt priority overwritting bug,
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| /ThreadX-v6.4.1/ports/arc_hs/metaware/ |
| D | readme_threadx.txt | 172 should be higher priority than all ThreadX-managed ISRs.
181 must have priority 0 and the application must call the following ThreadX API
216 timer 0, which generates low priority interrupts on interrupt vector 16.
217 It is easy to change the timer interrupt source and priority by changing the
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| /ThreadX-v6.4.1/ports/rxv1/gnu/src/ |
| D | tx_thread_context_restore.S | 198 MVTC #0, PSW ; Reset interrupt priority level to 0
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| /ThreadX-v6.4.1/ports/rxv2/gnu/src/ |
| D | tx_thread_context_restore.S | 205 MVTC #0, PSW ; Reset interrupt priority level to 0
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| /ThreadX-v6.4.1/ports/rxv2/iar/src/ |
| D | tx_thread_context_restore.s | 203 MVTC #0, PSW ; Reset interrupt priority level to 0
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| /ThreadX-v6.4.1/ports_module/rxv2/iar/module_manager/src/ |
| D | tx_thread_context_restore.s | 199 MVTC #0, PSW ; Reset interrupt priority level to 0
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| /ThreadX-v6.4.1/ports/rxv3/gnu/src/ |
| D | tx_thread_context_restore.S | 215 MVTC #0, PSW ; Reset interrupt priority level to 0
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| /ThreadX-v6.4.1/ports/rxv3/iar/src/ |
| D | tx_thread_context_restore.s | 213 MVTC #0, PSW ; Reset interrupt priority level to 0
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| /ThreadX-v6.4.1/utility/rtos_compatibility_layers/FreeRTOS/ |
| D | tx_freertos.c | 607 UINT priority; in uxTaskPriorityGet() local
616 ret = tx_thread_info_get(p_thread, NULL, NULL, NULL, &priority, NULL, NULL, NULL, NULL); in uxTaskPriorityGet()
622 priority = txfr_prio_tx_to_fr(priority); in uxTaskPriorityGet()
624 return priority; in uxTaskPriorityGet()
638 UINT priority; in vTaskPrioritySet() local
650 priority = uxNewPriority; in vTaskPrioritySet()
651 priority = txfr_prio_fr_to_tx(priority); in vTaskPrioritySet()
653 ret = tx_thread_priority_change(p_thread, priority, &old_priority); in vTaskPrioritySet()
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| /ThreadX-v6.4.1/utility/rtos_compatibility_layers/OSEK/ |
| D | threadx_osek_readme.txt | 117 Minimum OSEK task priority: 0
118 Maximum OSEK task priority: 23
196 UINT priority,
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| /ThreadX-v6.4.1/ports/linux/gnu/ |
| D | readme_threadx.txt | 57 itself is a Linux pthread. The ThreadX scheduler is the highest priority
107 /* Set up the ISR priority */
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| /ThreadX-v6.4.1/ports_smp/arc_hs_smp/metaware/ |
| D | readme_threadx.txt | 173 should be higher priority than all ThreadX-managed ISRs.
184 timer 0, which generates low priority interrupts on interrupt vector 16.
185 It is easy to change the timer interrupt source and priority by changing the
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| /ThreadX-v6.4.1/ports/cortex_m33/ac6/example_build/ |
| D | ARMCM33_DSP_FP_TZ_config.txt | 10 … # (int , init-time) default = '0x3' : Number of bits of interrupt priority : [0x3..0x8]
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| /ThreadX-v6.4.1/ports_module/cortex_m33/ac6/example_build/ |
| D | ARMCM33_DSP_FP_TZ_config.txt | 10 … # (int , init-time) default = '0x3' : Number of bits of interrupt priority : [0x3..0x8]
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| /ThreadX-v6.4.1/ports/cortex_r5/iar/ |
| D | readme_threadx.txt | 106 TX_MAX_PRIORITIES Defines the priority levels for ThreadX.
109 by 32. Increasing the number of priority levels
113 default, this value is set to 32 priority levels.
127 TX_TIMER_THREAD_PRIORITY Defines the priority of the internal ThreadX timer
128 … thread. The default value is priority 0 - the highest
129 priority in ThreadX. The default value is defined
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