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/ThreadX-v6.4.1/common_modules/module_lib/src/
Dtxm_trace_buffer_full_notify.c69 UINT _tx_trace_buffer_full_notify(VOID (*full_buffer_callback)(VOID *buffer)) in _tx_trace_buffer_full_notify() argument
/ThreadX-v6.4.1/common_smp/src/
Dtx_trace_buffer_full_notify.c76 UINT _tx_trace_buffer_full_notify(VOID (*full_buffer_callback)(VOID *buffer)) in _tx_trace_buffer_full_notify() argument
Dtx_trace_initialize.c77 VOID (*_tx_trace_full_notify_function)(VOID *buffer);
/ThreadX-v6.4.1/common/src/
Dtx_trace_buffer_full_notify.c76 UINT _tx_trace_buffer_full_notify(VOID (*full_buffer_callback)(VOID *buffer)) in _tx_trace_buffer_full_notify() argument
Dtx_trace_initialize.c77 VOID (*_tx_trace_full_notify_function)(VOID *buffer);
/ThreadX-v6.4.1/common_modules/module_manager/utilities/
Dmodule_to_binary.c105 unsigned char *buffer; in elf_object_read() local
108 buffer = (unsigned char *) object_address; in elf_object_read()
121 buffer[i] = (unsigned char) alpha; in elf_object_read()
Dmodule_to_c_array.c105 unsigned char *buffer; in elf_object_read() local
108 buffer = (unsigned char *) object_address; in elf_object_read()
121 buffer[i] = (unsigned char) alpha; in elf_object_read()
/ThreadX-v6.4.1/ports_module/cortex_a7/iar/example_build/
Dcstartup.s139 MCR p15, 0, r1, c7, c5, 4 ; Flush prefetch buffer because of FMXR below and
/ThreadX-v6.4.1/ports/cortex_a9/iar/example_build/
Dcstartup.s139 MCR p15, 0, r1, c7, c5, 4 ; Flush prefetch buffer because of FMXR below and
/ThreadX-v6.4.1/ports/cortex_a7/iar/example_build/
Dcstartup.s139 MCR p15, 0, r1, c7, c5, 4 ; Flush prefetch buffer because of FMXR below and
/ThreadX-v6.4.1/ports_arch/ARMv7-A/threadx/ports/iar/example_build/
Dcstartup.s139 MCR p15, 0, r1, c7, c5, 4 ; Flush prefetch buffer because of FMXR below and
/ThreadX-v6.4.1/common_smp/inc/
Dtx_trace.h434 TRACE_DECLARE VOID (*_tx_trace_full_notify_function)(VOID *buffer);
/ThreadX-v6.4.1/common/inc/
Dtx_trace.h434 TRACE_DECLARE VOID (*_tx_trace_full_notify_function)(VOID *buffer);
/ThreadX-v6.4.1/ports/cortex_a15/iar/example_build/
Dcstartup.s139 MCR p15, 0, r1, c7, c5, 4 ; Flush prefetch buffer because of FMXR below and
/ThreadX-v6.4.1/ports/cortex_a5/iar/example_build/
Dcstartup.s139 MCR p15, 0, r1, c7, c5, 4 ; Flush prefetch buffer because of FMXR below and
/ThreadX-v6.4.1/ports/cortex_a9/ac5/example_build/
Dtx_initialize_low_level.s103 MCR p15, 0, r1, c7, c5, 4 ; Flush prefetch buffer because of FMXR below and
/ThreadX-v6.4.1/ports/cortex_a7/ac5/example_build/
Dtx_initialize_low_level.s103 MCR p15, 0, r1, c7, c5, 4 ; Flush prefetch buffer because of FMXR below and
/ThreadX-v6.4.1/ports_smp/cortex_a9_smp/gnu/example_build/
Dstartup.S341 @; ; Disable loop-buffer to fix errata on A15 r0p0
543 MCR p15, 0, r1, c7, c5, 4 @ Flush prefetch buffer because of FMXR below and
/ThreadX-v6.4.1/ports_smp/cortex_a5_smp/gnu/example_build/
Dstartup.S341 @; ; Disable loop-buffer to fix errata on A15 r0p0
543 MCR p15, 0, r1, c7, c5, 4 @ Flush prefetch buffer because of FMXR below and
/ThreadX-v6.4.1/ports_smp/cortex_a7_smp/gnu/example_build/
Dstartup.S323 @; ; Disable loop-buffer to fix errata on A15 r0p0
525 MCR p15, 0, r1, c7, c5, 4 @ Flush prefetch buffer because of FMXR below and
/ThreadX-v6.4.1/ports_module/cortex_a7/ac5/example_build/
Dtx_initialize_low_level.s102 MCR p15, 0, r1, c7, c5, 4 ; Flush prefetch buffer because of FMXR below and
/ThreadX-v6.4.1/ports/cortex_r4/iar/
Dreadme_threadx.txt207 … feature. The trace buffer is supplied at a later time
/ThreadX-v6.4.1/ports/cortex_r5/iar/
Dreadme_threadx.txt207 … feature. The trace buffer is supplied at a later time
/ThreadX-v6.4.1/ports/cortex_a9/gnu/
Dreadme_threadx.txt206 … feature. The trace buffer is supplied at a later time
/ThreadX-v6.4.1/ports/cortex_a5/gnu/
Dreadme_threadx.txt206 … feature. The trace buffer is supplied at a later time

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