Home
last modified time | relevance | path

Searched refs:SR_SINT0 (Results 1 – 2 of 2) sorted by relevance

/ThreadX-v6.4.1/ports_smp/mips32_interaptiv_smp/gnu/example_build/
Dm32c0.h151 #define SR_SINT0 0x00000100 /* enable s/w interrupt 0 */ macro
/ThreadX-v6.4.1/ports_smp/mips32_interaptiv_smp/green/example_build/
Dm32c0.h151 #define SR_SINT0 0x00000100 /* enable s/w interrupt 0 */ macro