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Searched refs:GCR_REG3_BASE (Results 1 – 4 of 4) sorted by relevance

/ThreadX-v6.4.1/ports_smp/mips32_interaptiv_smp/gnu/example_build/
Dinit_cm.S80 sw a0, GCR_REG3_BASE(r22_gcr_addr) // GCR_REG3_BASE
Dcps.h235 #define GCR_REG3_BASE 0x00C0 macro
/ThreadX-v6.4.1/ports_smp/mips32_interaptiv_smp/green/example_build/
Dinit_cm.mip80 sw a0, GCR_REG3_BASE(r22_gcr_addr) // GCR_REG3_BASE
Dcps.h235 #define GCR_REG3_BASE 0x00C0 macro