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/ThreadX-v6.4.1/ports_smp/mips32_interaptiv_smp/gnu/example_build/
Dinit_cm.S65 sw a0, GCR_ACCESS(r22_gcr_addr) // GCR_ACCESS
Dcps.h113 #define GCR_ACCESS 0x0020 macro
/ThreadX-v6.4.1/ports_smp/mips32_interaptiv_smp/green/example_build/
Dinit_cm.mip65 sw a0, GCR_ACCESS(r22_gcr_addr) // GCR_ACCESS
Djoin_domain.mip63 // (Write access enabled via GCR_ACCESS by core 0.)
Dcps.h113 #define GCR_ACCESS 0x0020 macro