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/ThreadX-v6.4.1/ports_smp/mips32_interaptiv_smp/gnu/example_build/
Dm32c0.h272 #define CFG1_WR 0x00000008 /* watch registers implemented */ macro
/ThreadX-v6.4.1/ports_smp/mips32_interaptiv_smp/green/example_build/
Dm32c0.h272 #define CFG1_WR 0x00000008 /* watch registers implemented */ macro