Searched refs:C0_WATCHLO (Results 1 – 4 of 4) sorted by relevance
| /ThreadX-v6.4.1/ports_smp/mips32_interaptiv_smp/gnu/example_build/ |
| D | init_cp0.S | 72 mtc0 zero, C0_WATCHLO // write C0_WatchLo0
77 mtc0 zero, C0_WATCHLO, 1 // write C0_WatchLo1
82 mtc0 zero, C0_WATCHLO, 2 // write C0_WatchLo2
87 mtc0 zero, C0_WATCHLO, 3 // write C0_WatchLo3
92 mtc0 zero, C0_WATCHLO, 4 // write C0_WatchLo4
97 mtc0 zero, C0_WATCHLO, 5 // write C0_WatchLo5
102 mtc0 zero, C0_WATCHLO, 6 // write C0_WatchLo6
105 mtc0 zero, C0_WATCHLO, 7 // write C0_WatchLo7
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| D | m32c0.h | 454 #define C0_WATCHLO $18 macro
551 #define C0_WATCHLO 18
644 #define mips32_getwatchlo(sel) _mips_xxc0(C0_WATCHLO + (sel)*32, 0, 0)
645 #define mips32_setwatchlo(sel,v) _mips_xxc0(C0_WATCHLO + (sel)*32, ~0, v)
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| /ThreadX-v6.4.1/ports_smp/mips32_interaptiv_smp/green/example_build/ |
| D | init_cp0.mip | 72 mtc0 zero, C0_WATCHLO // write C0_WatchLo0
77 mtc0 zero, C0_WATCHLO, 1 // write C0_WatchLo1
82 mtc0 zero, C0_WATCHLO, 2 // write C0_WatchLo2
87 mtc0 zero, C0_WATCHLO, 3 // write C0_WatchLo3
92 mtc0 zero, C0_WATCHLO, 4 // write C0_WatchLo4
97 mtc0 zero, C0_WATCHLO, 5 // write C0_WatchLo5
102 mtc0 zero, C0_WATCHLO, 6 // write C0_WatchLo6
105 mtc0 zero, C0_WATCHLO, 7 // write C0_WatchLo7
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| D | m32c0.h | 454 #define C0_WATCHLO $18 macro
551 #define C0_WATCHLO 18
644 #define mips32_getwatchlo(sel) _mips_xxc0(C0_WATCHLO + (sel)*32, 0, 0)
645 #define mips32_setwatchlo(sel,v) _mips_xxc0(C0_WATCHLO + (sel)*32, ~0, v)
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