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Searched refs:C0_WATCHHI (Results 1 – 4 of 4) sorted by relevance

/ThreadX-v6.4.1/ports_smp/mips32_interaptiv_smp/gnu/example_build/
Dinit_cp0.S69 mtc0 v1, C0_WATCHHI // write C0_WatchHi0
70 mfc0 v0, C0_WATCHHI // read C0_WatchHi0
74 mtc0 v1, C0_WATCHHI, 1 // write C0_WatchHi1
75 mfc0 v0, C0_WATCHHI, 1 // read C0_WatchHi1
79 mtc0 v1, C0_WATCHHI, 2 // write C0_WatchHi2
80 mfc0 v0, C0_WATCHHI, 2 // read C0_WatchHi2
84 mtc0 v1, C0_WATCHHI, 3 // write C0_WatchHi3
85 mfc0 v0, C0_WATCHHI, 3 // read C0_WatchHi3
89 mtc0 v1, C0_WATCHHI, 4 // write C0_WatchHi4
90 mfc0 v0, C0_WATCHHI, 4 // read C0_WatchHi4
[all …]
Dm32c0.h455 #define C0_WATCHHI $19 macro
552 #define C0_WATCHHI 19
648 #define mips32_getwatchhi(sel) _mips_xxc0(C0_WATCHHI + (sel)*32, 0, 0)
649 #define mips32_setwatchhi(sel,v) _mips_xxc0(C0_WATCHHI + (sel)*32, ~0, v)
/ThreadX-v6.4.1/ports_smp/mips32_interaptiv_smp/green/example_build/
Dinit_cp0.mip69 mtc0 v1, C0_WATCHHI // write C0_WatchHi0
70 mfc0 v0, C0_WATCHHI // read C0_WatchHi0
74 mtc0 v1, C0_WATCHHI, 1 // write C0_WatchHi1
75 mfc0 v0, C0_WATCHHI, 1 // read C0_WatchHi1
79 mtc0 v1, C0_WATCHHI, 2 // write C0_WatchHi2
80 mfc0 v0, C0_WATCHHI, 2 // read C0_WatchHi2
84 mtc0 v1, C0_WATCHHI, 3 // write C0_WatchHi3
85 mfc0 v0, C0_WATCHHI, 3 // read C0_WatchHi3
89 mtc0 v1, C0_WATCHHI, 4 // write C0_WatchHi4
90 mfc0 v0, C0_WATCHHI, 4 // read C0_WatchHi4
[all …]
Dm32c0.h455 #define C0_WATCHHI $19 macro
552 #define C0_WATCHHI 19
648 #define mips32_getwatchhi(sel) _mips_xxc0(C0_WATCHHI + (sel)*32, 0, 0)
649 #define mips32_setwatchhi(sel,v) _mips_xxc0(C0_WATCHHI + (sel)*32, ~0, v)