Searched refs:C0_EBASE (Results 1 – 8 of 8) sorted by relevance
| /ThreadX-v6.4.1/ports_smp/mips32_interaptiv_smp/gnu/example_build/ |
| D | start.S | 117 mfc0 k1, C0_EBASE // Get cp0 EBase
126 mfc0 k1, C0_EBASE // Get cp0 EBase
132 mfc0 k1, C0_EBASE // Get cp0 EBase
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| D | set_gpr_boot_values.S | 70 mfc0 a0, C0_EBASE // Read CP0 EBase
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| D | init_vpe1.S | 215 mftc0 v0, C0_EBASE // read C0_EBASE
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| D | m32c0.h | 447 #define C0_EBASE $15,1 macro
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| /ThreadX-v6.4.1/ports_smp/mips32_interaptiv_smp/green/example_build/ |
| D | init_vpe1.mip | 215 mftc0 v0, C0_EBASE // read C0_EBASE
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| D | start.mip | 117 mfc0 k1, C0_EBASE // Get cp0 EBase
126 mfc0 k1, C0_EBASE // Get cp0 EBase
132 mfc0 k1, C0_EBASE // Get cp0 EBase
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| D | m32c0.h | 447 #define C0_EBASE $15,1 macro
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| D | set_gpr_boot_values.mip | 70 mfc0 a0, C0_EBASE // Read CP0 EBase
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