Home
last modified time | relevance | path

Searched defs:SVC_MODE (Results 1 – 25 of 217) sorted by relevance

123456789

/ThreadX-v6.4.1/ports/arm9/gnu/src/
Dtx_thread_context_restore.S28 SVC_MODE = 0xD3 @ Disable IRQ/FIQ, SVC mode define
31 SVC_MODE = 0x93 @ Disable IRQ, SVC mode define
/ThreadX-v6.4.1/ports/arm11/gnu/src/
Dtx_thread_context_restore.S28 SVC_MODE = 0xD3 @ Disable IRQ/FIQ, SVC mode define
31 SVC_MODE = 0x93 @ Disable IRQ, SVC mode define
/ThreadX-v6.4.1/ports/cortex_r5/ac6/src/
Dtx_thread_context_restore.S35 SVC_MODE = 0xD3 @ Disable IRQ/FIQ, SVC mode define
38 SVC_MODE = 0x93 @ Disable IRQ, SVC mode define
/ThreadX-v6.4.1/ports/cortex_a15/iar/src/
Dtx_thread_context_restore.s33 SVC_MODE DEFINE 0xD3 ; Disable IRQ/FIQ, SVC mode label
36 SVC_MODE DEFINE 0x93 ; Disable IRQ, SVC mode label
Dtx_thread_stack_build.s31 SVC_MODE DEFINE 0x13 ; SVC mode label
/ThreadX-v6.4.1/ports/cortex_r4/gnu/src/
Dtx_thread_context_restore.S28 SVC_MODE = 0xD3 @ Disable IRQ/FIQ, SVC mode define
31 SVC_MODE = 0x93 @ Disable IRQ, SVC mode define
/ThreadX-v6.4.1/ports/cortex_r5/gnu/src/
Dtx_thread_context_restore.S28 SVC_MODE = 0xD3 @ Disable IRQ/FIQ, SVC mode define
31 SVC_MODE = 0x93 @ Disable IRQ, SVC mode define
/ThreadX-v6.4.1/ports/cortex_a7/ac5/src/
Dtx_thread_context_restore.s36 SVC_MODE EQU 0xD3 ; SVC mode define
40 SVC_MODE EQU 0x93 ; SVC mode define
/ThreadX-v6.4.1/ports/cortex_r4/ac5/src/
Dtx_thread_context_restore.s36 SVC_MODE EQU 0xD3 ; SVC mode define
40 SVC_MODE EQU 0x93 ; SVC mode define
/ThreadX-v6.4.1/ports/cortex_r5/ac5/src/
Dtx_thread_context_restore.s36 SVC_MODE EQU 0xD3 ; SVC mode define
40 SVC_MODE EQU 0x93 ; SVC mode define
/ThreadX-v6.4.1/ports/cortex_a8/ac5/src/
Dtx_thread_context_restore.s36 SVC_MODE EQU 0xD3 ; SVC mode define
40 SVC_MODE EQU 0x93 ; SVC mode define
/ThreadX-v6.4.1/ports/cortex_a5/ac5/src/
Dtx_thread_context_restore.s36 SVC_MODE EQU 0xD3 ; SVC mode define
40 SVC_MODE EQU 0x93 ; SVC mode define
/ThreadX-v6.4.1/ports/cortex_a9/ac5/src/
Dtx_thread_context_restore.s36 SVC_MODE EQU 0xD3 ; SVC mode define
40 SVC_MODE EQU 0x93 ; SVC mode define
/ThreadX-v6.4.1/ports/cortex_r4/iar/src/
Dtx_thread_stack_build.s32 SVC_MODE DEFINE 0x13 ; SVC mode label
/ThreadX-v6.4.1/ports/cortex_r5/iar/src/
Dtx_thread_stack_build.s32 SVC_MODE DEFINE 0x13 ; SVC mode label
/ThreadX-v6.4.1/ports_smp/cortex_r8_smp/ac5/src/
Dtx_thread_context_restore.s25 SVC_MODE EQU 0xD3 // SVC mode define
29 SVC_MODE EQU 0x93 // SVC mode define
/ThreadX-v6.4.1/ports_smp/cortex_a7_smp/gnu/src/
Dtx_thread_context_restore.S37 SVC_MODE = 0xD3 @ Disable IRQ/FIQ, SVC mode define
40 SVC_MODE = 0x93 @ Disable IRQ, SVC mode define
/ThreadX-v6.4.1/ports/cortex_a9/iar/src/
Dtx_thread_stack_build.s32 SVC_MODE DEFINE 0x13 ; SVC mode label
/ThreadX-v6.4.1/ports/arm11/iar/src/
Dtx_thread_stack_build.s32 SVC_MODE DEFINE 0x13 ; SVC mode label
/ThreadX-v6.4.1/ports/arm9/iar/src/
Dtx_thread_stack_build.s32 SVC_MODE DEFINE 0x13 ; SVC mode label
/ThreadX-v6.4.1/ports/cortex_a7/iar/src/
Dtx_thread_stack_build.s32 SVC_MODE DEFINE 0x13 ; SVC mode label
/ThreadX-v6.4.1/ports/cortex_a8/iar/src/
Dtx_thread_stack_build.s32 SVC_MODE DEFINE 0x13 ; SVC mode label
/ThreadX-v6.4.1/ports/cortex_a5/iar/src/
Dtx_thread_stack_build.s32 SVC_MODE DEFINE 0x13 ; SVC mode label
/ThreadX-v6.4.1/ports/arm9/ac5/src/
Dtx_thread_stack_build.s32 SVC_MODE EQU 0x13 ; SVC mode define
/ThreadX-v6.4.1/ports/arm11/ac5/src/
Dtx_thread_stack_build.s32 SVC_MODE EQU 0x13 ; SVC mode define

123456789