| /ThreadX-v6.2.1/ports/arm9/ac5/src/ |
| D | tx_thread_interrupt_disable.s | 33 DISABLE_INTS EQU 0xC0 ; IRQ & FIQ interrupts disabled define
35 DISABLE_INTS EQU 0x80 ; IRQ interrupts disabled define
|
| D | tx_thread_system_return.s | 34 DISABLE_INTS EQU 0xC0 ; IRQ & FIQ interrupts disabled define
36 DISABLE_INTS EQU 0x80 ; IRQ interrupts disabled define
|
| /ThreadX-v6.2.1/ports/arm11/ac5/src/ |
| D | tx_thread_interrupt_disable.s | 33 DISABLE_INTS EQU 0xC0 ; IRQ & FIQ interrupts disabled define
35 DISABLE_INTS EQU 0x80 ; IRQ interrupts disabled define
|
| D | tx_thread_system_return.s | 34 DISABLE_INTS EQU 0xC0 ; IRQ & FIQ interrupts disabled define
36 DISABLE_INTS EQU 0x80 ; IRQ interrupts disabled define
|
| /ThreadX-v6.2.1/ports/cortex_a5/iar/src/ |
| D | tx_thread_interrupt_disable.s | 33 DISABLE_INTS DEFINE 0xC0 ; IRQ & FIQ interrupts disabled label
35 DISABLE_INTS DEFINE 0x80 ; IRQ interrupts disabled label
|
| /ThreadX-v6.2.1/ports/arm11/iar/src/ |
| D | tx_thread_interrupt_disable.s | 33 DISABLE_INTS DEFINE 0xC0 ; IRQ & FIQ interrupts disabled label
35 DISABLE_INTS DEFINE 0x80 ; IRQ interrupts disabled label
|
| /ThreadX-v6.2.1/ports/cortex_a8/iar/src/ |
| D | tx_thread_interrupt_disable.s | 33 DISABLE_INTS DEFINE 0xC0 ; IRQ & FIQ interrupts disabled label
35 DISABLE_INTS DEFINE 0x80 ; IRQ interrupts disabled label
|
| /ThreadX-v6.2.1/ports/cortex_a9/iar/src/ |
| D | tx_thread_interrupt_disable.s | 33 DISABLE_INTS DEFINE 0xC0 ; IRQ & FIQ interrupts disabled label
35 DISABLE_INTS DEFINE 0x80 ; IRQ interrupts disabled label
|
| /ThreadX-v6.2.1/ports/arm11/gnu/src/ |
| D | tx_thread_interrupt_disable.S | 27 DISABLE_INTS = 0xC0 @ IRQ & FIQ interrupts disabled define
29 DISABLE_INTS = 0x80 @ IRQ interrupts disabled define
|
| /ThreadX-v6.2.1/ports/arm9/gnu/src/ |
| D | tx_thread_interrupt_disable.S | 27 DISABLE_INTS = 0xC0 @ IRQ & FIQ interrupts disabled define
29 DISABLE_INTS = 0x80 @ IRQ interrupts disabled define
|
| /ThreadX-v6.2.1/ports/cortex_a7/iar/src/ |
| D | tx_thread_interrupt_disable.s | 33 DISABLE_INTS DEFINE 0xC0 ; IRQ & FIQ interrupts disabled label
35 DISABLE_INTS DEFINE 0x80 ; IRQ interrupts disabled label
|
| /ThreadX-v6.2.1/ports/arm9/iar/src/ |
| D | tx_thread_interrupt_disable.s | 33 DISABLE_INTS DEFINE 0xC0 ; IRQ & FIQ interrupts disabled label
35 DISABLE_INTS DEFINE 0x80 ; IRQ interrupts disabled label
|
| /ThreadX-v6.2.1/ports_module/cortex_a7/ac5/module_manager/src/ |
| D | tx_thread_fiq_nesting_end.s | 34 DISABLE_INTS EQU 0xC0 ; Disable IRQ & FIQ interrupts define
36 DISABLE_INTS EQU 0x80 ; Disable IRQ interrupts define
|
| D | tx_thread_irq_nesting_end.s | 34 DISABLE_INTS EQU 0xC0 ; Disable IRQ & FIQ interrupts define
36 DISABLE_INTS EQU 0x80 ; Disable IRQ interrupts define
|
| /ThreadX-v6.2.1/ports_module/cortex_a7/gnu/module_manager/src/ |
| D | tx_thread_fiq_nesting_end.s | 24 DISABLE_INTS = 0xC0 // Disable IRQ/FIQ interrupts define
26 DISABLE_INTS = 0x80 // Disable IRQ interrupts define
|
| D | tx_thread_irq_nesting_end.s | 24 DISABLE_INTS = 0xC0 // Disable IRQ/FIQ interrupts define
26 DISABLE_INTS = 0x80 // Disable IRQ interrupts define
|
| /ThreadX-v6.2.1/ports_module/cortex_a7/iar/module_manager/src/ |
| D | tx_thread_fiq_nesting_end.s | 24 DISABLE_INTS EQU 0xC0 ; Disable IRQ & FIQ interrupts define
26 DISABLE_INTS EQU 0x80 ; Disable IRQ interrupts define
|
| D | tx_thread_irq_nesting_end.s | 27 DISABLE_INTS EQU 0xC0 ; Disable IRQ & FIQ interrupts define
29 DISABLE_INTS EQU 0x80 ; Disable IRQ interrupts define
|
| /ThreadX-v6.2.1/ports_smp/cortex_a7_smp/ac5/src/ |
| D | tx_thread_irq_nesting_end.s | 34 DISABLE_INTS EQU 0xC0 ; Disable IRQ & FIQ interrupts define
36 DISABLE_INTS EQU 0x80 ; Disable IRQ interrupts define
|
| /ThreadX-v6.2.1/ports_smp/cortex_a7_smp/gnu/src/ |
| D | tx_thread_irq_nesting_end.S | 34 DISABLE_INTS = 0xC0 @ Disable IRQ/FIQ interrupts define
36 DISABLE_INTS = 0x80 @ Disable IRQ interrupts define
|
| /ThreadX-v6.2.1/ports_smp/cortex_a9_smp/ac5/src/ |
| D | tx_thread_irq_nesting_end.s | 34 DISABLE_INTS EQU 0xC0 ; Disable IRQ & FIQ interrupts define
36 DISABLE_INTS EQU 0x80 ; Disable IRQ interrupts define
|
| /ThreadX-v6.2.1/ports_smp/cortex_a9_smp/gnu/src/ |
| D | tx_thread_irq_nesting_end.S | 34 DISABLE_INTS = 0xC0 @ Disable IRQ & FIQ interrupts define
36 DISABLE_INTS = 0x80 @ Disable IRQ interrupts define
|
| /ThreadX-v6.2.1/ports_smp/cortex_r8_smp/ac5/src/ |
| D | tx_thread_irq_nesting_end.s | 23 DISABLE_INTS EQU 0xC0 // Disable IRQ & FIQ interrupts define
25 DISABLE_INTS EQU 0x80 // Disable IRQ interrupts define
|
| /ThreadX-v6.2.1/ports_smp/cortex_a5_smp/ac5/src/ |
| D | tx_thread_irq_nesting_end.s | 34 DISABLE_INTS EQU 0xC0 ; Disable IRQ & FIQ interrupts define
36 DISABLE_INTS EQU 0x80 ; Disable IRQ interrupts define
|
| /ThreadX-v6.2.1/ports_smp/cortex_a5_smp/gnu/src/ |
| D | tx_thread_irq_nesting_end.S | 34 DISABLE_INTS = 0xC0 @ Disable IRQ & FIQ interrupts define
36 DISABLE_INTS = 0x80 @ Disable IRQ interrupts define
|
