1*** Variables *** 2${64bit_cpu}= cpu: CPU.RiscV64 @ sysbus { cpuType: \\"rv64imac_zicsr_zba_zbb\\"; timeProvider: empty } 3${32bit_cpu}= cpu: CPU.RiscV32 @ sysbus { cpuType: \\"rv32imac_zicsr_zba_zbb\\"; timeProvider: empty } 4 5*** Keywords *** 6Create Machine 7 [Arguments] ${repl} 8 Execute Command mach create 9 Execute Command machine LoadPlatformDescriptionFromString "${repl}" 10 Execute Command machine LoadPlatformDescriptionFromString "mem: Memory.MappedMemory @ sysbus 0x0 { size: 0x1000 }" 11 12 Execute Command sysbus.cpu PC 0x0 13 14Load RORI Test To Memory 15 # li a0, 0x1 16 Execute Command sysbus WriteWord 0x0 0x4505 17 18 # addi a0, a0, 1 19 Execute Command sysbus WriteWord 0x2 0x0505 20 21 # rori a0, a0, 1 22 Execute Command sysbus WriteDoubleWord 0x4 0x60155513 23 24 # rori a0, a0, 1 25 Execute Command sysbus WriteDoubleWord 0x8 0x60155513 26 27Load RORIW Test To Memory 28 # li a0, 0x1 29 Execute Command sysbus WriteWord 0x0 0x4505 30 31 # addi a0, a0, 1 32 Execute Command sysbus WriteWord 0x2 0x0505 33 34 # roriw a0, a0, 1 35 Execute Command sysbus WriteDoubleWord 0x4 0x6015551B 36 37 # roriw a0, a0, 1 38 Execute Command sysbus WriteDoubleWord 0x8 0x6015551B 39 40Load SLLI.UW Test To Memory 41 # li a0, 0x1 42 Execute Command sysbus WriteWord 0x0 0x4505 43 44 # addi a0, a0, 1 45 Execute Command sysbus WriteWord 0x2 0x0505 46 47 # slli.uw a0, a0, 1 48 Execute Command sysbus WriteDoubleWord 0x4 0x0815151B 49 50 # li a0, 0x0000000040000000 51 Execute Command sysbus WriteDoubleWord 0x8 0x40000537 52 53 # slli.uw a0, a0, 1 54 Execute Command sysbus WriteDoubleWord 0xC 0x0815151B 55 56*** Test Cases *** 57Should Handle RORI Properly on 64 Bit CPU 58 Create Machine ${64bit_cpu} 59 Load RORI Test To Memory 60 61 Execute Command sysbus.cpu Step 62 Register Should Be Equal 10 0x1 63 Execute Command sysbus.cpu Step 64 Register Should Be Equal 10 0x2 65 Execute Command sysbus.cpu Step 66 Register Should Be Equal 10 0x1 67 Execute Command sysbus.cpu Step 68 Register Should Be Equal 10 0x8000000000000000 69 70Should Handle RORI Properly on 32 Bit CPU 71 Create Machine ${32bit_cpu} 72 Load RORI Test To Memory 73 74 Execute Command sysbus.cpu Step 75 Register Should Be Equal 10 0x1 76 Execute Command sysbus.cpu Step 77 Register Should Be Equal 10 0x2 78 Execute Command sysbus.cpu Step 79 Register Should Be Equal 10 0x1 80 Execute Command sysbus.cpu Step 81 Register Should Be Equal 10 0x80000000 82 83Should Handle RORIW Properly 84 # This instruction is supported only on 64 bit CPUs 85 Create Machine ${64bit_cpu} 86 Load RORIW Test To Memory 87 88 Execute Command sysbus.cpu Step 89 Register Should Be Equal 10 0x1 90 Execute Command sysbus.cpu Step 91 Register Should Be Equal 10 0x2 92 Execute Command sysbus.cpu Step 93 Register Should Be Equal 10 0x1 94 Execute Command sysbus.cpu Step 95 Register Should Be Equal 10 0xFFFFFFFF80000000 96 97Should Handle SLLI.UW Properly 98 Create Machine ${64bit_cpu} 99 Load SLLI.UW Test To Memory 100 101 Execute Command sysbus.cpu Step 102 Register Should Be Equal 10 0x1 103 Execute Command sysbus.cpu Step 104 Register Should Be Equal 10 0x2 105 Execute Command sysbus.cpu Step 106 Register Should Be Equal 10 0x4 107 Execute Command sysbus.cpu Step 108 Register Should Be Equal 10 0x0000000040000000 109 Execute Command sysbus.cpu Step 110 Register Should Be Equal 10 0xFFFFFFFF80000000