1*** Variables *** 2${MTVEC} 0x80080000 3 4${RV32_PRIV10}= SEPARATOR=${\n} 5... """ 6... cpu: CPU.RiscV32 @ sysbus 7... ${SPACE*4}cpuType: "rv32gcv" 8... ${SPACE*4}privilegedArchitecture: PrivilegedArchitecture.Priv1_10 9... ${SPACE*4}timeProvider: empty 10... 11... dram: Memory.MappedMemory @ sysbus 0x80000000 12... ${SPACE*4}size: 0x06400000 13... """ 14 15 16*** Keywords *** 17Write Opcode To 18 [Arguments] ${adress} ${opcode} 19 Execute Command sysbus WriteDoubleWord ${adress} ${opcode} 20 21Create RV32PRIV10 Machine 22 Execute Command using sysbus 23 Execute Command mach create 24 Execute Command machine LoadPlatformDescriptionFromString ${RV32_PRIV10} 25 26Prepare RV32 State 27 Execute Command cpu MTVEC ${MTVEC} 28 Execute Command cpu PC 0x80000000 29 30Step Once And Ensure Not Trapped 31 [Arguments] ${trap_adress} 32 33 ${PC}= Execute Command cpu Step 34 Should Not Be Equal As Integers ${PC} ${trap_adress} 35 36 37*** Test Cases *** 38Should Not Throw Exception After MRET in the NAPOT GRAIN32 Configuration 39 Create RV32PRIV10 Machine 40 Prepare RV32 State 41 42 #################################### 43 # PMP Configuration: # 44 # Rules : 1 (pmpaddr0 + pmpcfg0) # 45 # Mode : NAPOT # 46 # Grain : 32 # 47 # # 48 # Expected configuration: # 49 # - sa = 0x0 # 50 # - ea = 0xFFFFFFFF # 51 # - privs = R/W/X # 52 # - lock = false # 53 #################################### 54 55 # Aligment 56 Write Opcode To 0x80000000 0x13 # nop 57 58 # Set up pmpaddr0 59 Write Opcode To 0x80000004 0x800002b7 # lui t0,0x80000 60 Write Opcode To 0x80000008 0x12fd # addi t0,t0,-1 # t0 = 0x7fffffff 61 Write Opcode To 0x8000000A 0x3b029073 # csrw pmpaddr0,t0 62 63 # Set up pmpcfg0 64 Write Opcode To 0x8000000E 0x42fd # li t0,31 65 Write Opcode To 0x80000010 0x3a029073 # csrw pmpcfg0,t0 66 67 Execute Command cpu MEPC 0x80000018 68 Write Opcode To 0x80000014 0x30200073 # mret 69 70 Execute Command cpu Step 7 71 72 73 74 ################################ 75 # PMP TEST START # 76 ################################ 77 78 # Test code execution from the PMP covered region 79 Write Opcode To 0x80000018 0x13 # nop 80 Step Once And Ensure Not Trapped ${MTVEC} 81 82 # Test loads from the PMP covered region 83 Execute Command cpu SetRegister 8 0x80001000 84 Write Opcode To 0x8000001c 0x00042483 # lw s1, 0(s0) 85 Step Once And Ensure Not Trapped ${MTVEC} 86 87 # Test writes to PMP covered region 88 Write Opcode To 0x80000020 0x00942023 # sw s1,0(s0) 89 Step Once And Ensure Not Trapped ${MTVEC} 90