1*** Keywords ***
2Test Memory
3    [Arguments]  ${address}  ${expected_value}
4    ${actual_value}=         Execute Command  sysbus ReadDoubleWord ${address}
5    Should Be Equal As Numbers    ${actual_value}  ${expected_value}
6
7Execute Loop And Verify Counter
8    [Arguments]  ${expected_value}
9    Execute Command          sysbus.cpu Step 2
10    Test Memory              0xf0000004  ${expected_value}
11
12*** Test Cases ***
13Should Parse Monitor in CPU Hook
14    Execute Command          include @scripts/single-node/miv.resc
15    Execute Command          cpu AddHook `cpu PC` "monitor.Parse('log \\"message from the cpu hook\\"')"
16
17    Create Log Tester        1
18    Start Emulation
19
20    Wait For Log Entry       message from the cpu hook
21
22
23Should Stop On Peripheral Read Watchpoint
24    Execute Command          mach create
25    Execute Command          machine LoadPlatformDescriptionFromString "cpu: CPU.ARMv7A @ sysbus { cpuType: \\"cortex-a9\\" }"
26    Execute Command          machine LoadPlatformDescriptionFromString "mem: Memory.MappedMemory @ sysbus 0x0 { size: 0x1000 }"
27    Execute Command          machine PyDevFromFile @scripts/pydev/counter.py 0xf0000004 0x4 True "ctr"
28
29    # counter should increment on every read on sysbus
30    Test Memory              0xf0000004  0x0
31    Test Memory              0xf0000004  0x1
32
33    # ldrb r0, [r1]
34    Execute Command          sysbus WriteDoubleWord 0x10 0xe5d10000
35    # b 0x10
36    Execute Command          sysbus WriteDoubleWord 0x14 0xeafffffd
37
38    Execute Command          sysbus.cpu PC 0x10
39    Execute Command          sysbus.cpu SetRegister 1 0xf0000004
40
41    # add an empty watchpoint
42    Execute Command          sysbus AddWatchpointHook 0xf0000004 1 Read ""
43
44    # make sure nothing read the counter after adding the watchpoint
45    Test Memory              0xf0000004  0x2
46
47    # it's expected for counter to increase by 2 as a result of
48    # executing the `ldrb` instruction followed by the memory test
49    Execute Loop And Verify Counter   0x4
50    Execute Loop And Verify Counter   0x6
51    Execute Loop And Verify Counter   0x8
52
53Test Enabling Systick And Pausing Emulation From CortexM Hook
54    # This test shouldn't take much more than 1s but if the systick logic is wrong, it can get stuck.
55    [Timeout]                10s
56
57    ${platform}=             catenate  SEPARATOR=
58    ...  nvic: IRQControllers.NVIC @ sysbus 0xe000e000 { -> cpu@0 }          ${\n}
59    ...  cpu: CPU.CortexM @ sysbus { cpuType: \\"cortex-m0\\"; nvic: nvic }  ${\n}
60    ...  mem: Memory.MappedMemory @ sysbus 0x0 { size: 0x10000 }             ${\n}
61
62    Execute Command          mach create
63    Execute Command          machine LoadPlatformDescriptionFromString "${platform}"
64    Create Log Tester        0.001
65
66    # Enable all NVIC logs and set reload value zero.
67    Execute Command          logLevel -1 nvic
68    Execute Command          nvic WriteDoubleWord 0x14 0x0
69
70    # Empty memory acts as NOPs in ARM so not loading anything to memory isn't an issue.
71    Execute Command          cpu PC 0x0
72
73    # Let's make CPU enable systick and pause emulation soon after from hooks. This will freeze
74    # Renode if systick's underlying LimitTimer really can be enabled with limit zero.
75    Execute Command          cpu AddHook 0x10 "machine.SystemBus.WriteDoubleWord(0xe000e010, 0x1)"
76    Execute Command          cpu AddHook 0x20 "machine.PauseAndRequestEmulationPause()"
77
78    # Let's wait for the systick enabling attempt and machine pausing.
79    Wait For Log Entry       Systick_NS enabled but it won't be started as long as the reload value is zero
80    Wait For Log Entry       Machine paused
81
82Test Translation Block Fetch Hook
83    Execute Command          i @scripts/single-node/stm32l072.resc
84    Execute Command          cpu LogTranslationBlockFetch True
85    Create Log Tester        1
86
87    Wait For Log Entry       cpu: Fetching block @ 0x08004E4C - z_arm_reset
88    Wait For Log Entry       cpu: Fetching block @ 0x0800471C - stm32_clock_control_init
89    Wait For Log Entry       cpu: Fetching block @ 0x08009ED8 - idle
90    Wait For Log entry       cpu: Fetching block @ 0x0800483E - sys_clock_isr
91