1*** Variables ***
2${URI}                   @https://dl.antmicro.com/projects/renode
3
4
5*** Keywords ***
6Create Machine
7    [Arguments]    ${step_blocking}=false
8    Execute Command             using sysbus
9    Execute Command             mach create
10    Execute Command             machine LoadPlatformDescription @platforms/cpus/sifive-fu540.repl
11
12    Execute Command             sysbus LoadELF ${URI}/hifive-unleashed--bbl.elf-s_17219640-c7e1b920bf81be4062f467d9ecf689dbf7f29c7a
13    Execute Command             sysbus LoadFdt ${URI}/hifive-unleashed--devicetree.dtb-s_10532-70cd4fc9f3b4df929eba6e6f22d02e6ce4c17bd1 0x81000000 "earlyconsole mem=256M@0x80000000"
14    Execute Command             e51 SetRegister 11 0x81000000
15
16    Execute Command             emulation SingleStepBlocking ${step_blocking}
17    Execute Command             u54_1 ExecutionMode SingleStep
18
19    Create Terminal Tester      sysbus.uart0
20
21${cpu} PC ${should:(Should|Shouldn't)} Be Equal To ${pc_expected}
22    ${pc}=  Execute Command     ${cpu} PC
23    IF    "${should}" == "Should"
24        Should Be Equal As Integers    ${pc}    ${pc_expected}
25    ELSE
26        Should Not Be Equal As Integers    ${pc}    ${pc_expected}
27    END
28
29SingleStep Should Be Blocking
30    ${isBlocking}=  Execute Command    emulation SingleStepBlocking
31    Should Be True                     ${isBlocking}
32
33*** Test Cases ***
34Should Start Execution With One Core In SingleStepNonBlocking
35    Create Machine
36    Execute Command             start
37    Wait For Line On Uart       smp: Bringing up secondary CPUs
38
39
40Should Step Core In SingleStepNonBlocking
41    Create Machine
42    Execute Command             start
43    Wait For Line On Uart       smp: Bringing up secondary CPUs
44
45    ${x}=  Execute Command      u54_1 PC
46    Should Contain              ${x}  0x80000000
47
48    Execute Command             u54_1 Step
49
50    ${x}=  Execute Command      u54_1 PC
51    Should Contain              ${x}  0x800001f8
52
53
54Should Step Core In SingleStepNonBlocking Over Quantum Limit
55    Create Machine
56    Execute Command             u54_1 PerformanceInMips 1
57    Execute Command             machine SetQuantum "00:00:00.000100"
58    Execute Command             start
59    Wait For Line On Uart       smp: Bringing up secondary CPUs
60
61    # InstructionsPerQuantum = MIPS * Quantum =  10^6 * 10^-4 = 100
62    # Every Quant (time allowance) will consist of a maximum of 100 instructions
63    # Thereby stepping by 101 steps, guarantees that the next Quantum will need to be given
64
65    ${x}=  Execute Command      u54_1 Step 101
66    Should Contain              ${x}  0x0000000080001C1C
67
68Step Should Be Blocking By Default
69    SingleStep Should Be Blocking
70
71Step Should Be Blocking After Deserialization
72    # Let's change to make sure the value isn't serialized.
73    Execute Command             emulation SingleStepBlocking false
74
75    ${tmp_file}=                Allocate Temporary File
76    Execute Command             Save @${tmp_file}
77    Execute Command             Load @${tmp_file}
78
79    SingleStep Should Be Blocking
80
81Test SingleStepBlocking Change After Blocking Steps
82    Create Machine              step_blocking=True
83
84    # Let's do a single step; PCs of other cores change on the first step.
85    Execute Command             u54_1 Step
86
87    # Let's keep PCs for two other cores.
88    ${pc_e51}=
89    ...    Execute Command      e51 PC
90    ${pc_u54_2}=
91    ...    Execute Command      u54_2 PC
92
93    Execute Command             u54_1 Step 10
94
95    # Let's make sure PCs are the same.
96    e51 PC Should Be Equal To ${pc_e51}
97    u54_2 PC Should Be Equal To ${pc_u54_2}
98
99    # Now make SingleStep non-blocking without any other changes.
100    Execute Command             emulation SingleStepBlocking false
101
102    # Other cores should be able to reach it.
103    Wait For Line On Uart       smp: Bringing up secondary CPUs
104