1*** Variables *** 2${CPU0_INITIATOR_STRING} the initiator 'cpu0' 3${POSSIBLE_INITIATORS_STRING} peripherals implementing IPeripheralWithTransactionState (initiator not specified) 4 5 6*** Keywords *** 7Command Result Should Be Number 8 [Arguments] ${command} ${result} 9 10 ${actual}= Execute Command ${command} 11 Should Be Equal As Numbers ${actual} ${result} 12 13Create Bus Isolation Machine 14 Execute Script tests/unit-tests/bus_isolation.resc 15 16Register With Condition And Expect Error 17 [Arguments] ${condition} ${error} 18 19 Run Keyword And Expect Error *${error}* 20 ... Execute Command machine LoadPlatformDescriptionFromString "uart: UART.PL011 @ sysbus new Bus.BusPointRegistration { address: 0x0; condition: \\"${condition}\\" }" 21 22 23*** Test Cases *** 24Should Handle Separation By State In Secure World 25 Create Bus Isolation Machine 26 Execute Command cpu0 Step 100 27 28 Register Should Be Equal 3 0x1010 29 Register Should Be Equal 4 0x2020 30 Register Should Be Equal 5 0x3030 31 Register Should Be Equal 6 0x4444 32 Register Should Be Equal 7 0x63707507 33 Register Should Be Equal 8 0x63707507 34 Register Should Be Equal 9 0x1010 35 Register Should Be Equal 10 0 36 Register Should Be Equal 11 0x3030 37 Register Should Be Equal 12 0x0404 38 Register Should Be Equal 13 0x63707506 39 Register Should Be Equal 14 0x63707506 40 41 42Should Handle Separation By State In Nonsecure World 43 Create Bus Isolation Machine 44 Execute Command cpu0 SecureState false 45 Execute Command cpu0 Step 100 46 47 Register Should Be Equal 3 0 48 Register Should Be Equal 4 0 49 Register Should Be Equal 5 0x3030 50 Register Should Be Equal 6 0x4444 51 Register Should Be Equal 7 0x63707501 52 Register Should Be Equal 8 0x63707501 53 Register Should Be Equal 9 0x1010 54 Register Should Be Equal 10 0 55 Register Should Be Equal 11 0x3030 56 Register Should Be Equal 12 0x0404 57 Register Should Be Equal 13 0x63707500 58 Register Should Be Equal 14 0x63707500 59 60Should Read Through Privilege Aware Reader 61 Create Bus Isolation Machine 62 63 # ↓ raw initiator state which gets passed to the peripheral 64 Command Result Should Be Number reader Read 0x10010 0x00 0x72656100 65 Command Result Should Be Number reader Read 0x10010 0x01 0x72656101 66 Command Result Should Be Number reader Read 0x10010 0xa5 0x72656105 67 Command Result Should Be Number reader Read 0x20010 0x02 0x72656102 68 69 # Now we'll read some peripherals that have various conditions. 70 Command Result Should Be Number reader Read 0x10008 0x00 0x3030 # no condition 71 Command Result Should Be Number reader Read 0x10008 0x01 0x3030 # no condition 72 73 # condition: privileged and condition: !privileged, here decoded according to CortexM.StateBits, 74 # so it should only differ based on bit[0] of state 75 Command Result Should Be Number reader Read 0x1000c 0x00 0x0404 76 Command Result Should Be Number reader Read 0x1000c 0x01 0x4444 77 Command Result Should Be Number reader Read 0x1000c 0x02 0x0404 78 Command Result Should Be Number reader Read 0x1000c 0x03 0x4444 79 80 # condition: cpuSecure && privileged && initiator == cpu0, so we will not be able to read it even if the correct state 81 # (0x3) is specified 82 Command Result Should Be Number reader Read 0x10004 0x00 0 83 Command Result Should Be Number reader Read 0x10004 0x03 0 84 85Should Handle Readers And Log Context Access 86 Create Bus Isolation Machine 87 Create Log Tester 1 88 89 Command Result Should Be Number reader Read 0x10010 0x00 0x72656100 90 Wait For Log Entry priv_aware: Read from context 91 92 Command Result Should Be Number reader2 Read 0x10010 0x00 0 93 Wait For Log Entry priv_aware: No context 94 95 Command Result Should Be Number reader3 Read 0x10010 0x00 0 96 Wait For Log Entry sysbus: ReadDoubleWord from non existing peripheral at 0x10010 97 98Should Not Read Directly From Sysbus 99 Create Bus Isolation Machine 100 101 # Because priv_aware has a requirement that the initiator is cpu0 or reader, this will not work to access it 102 Command Result Should Be Number sysbus ReadDoubleWord 0x10010 0 103 104 # Because priv2_priv and priv2_unpriv have state requirements, this will not work to access either of them 105 Command Result Should Be Number sysbus ReadDoubleWord 0x1000c 0 106 107 # Because priv requires that the initiator is cpu0 in a specific state, this will not work either 108 Command Result Should Be Number sysbus ReadDoubleWord 0x10004 0 109 110Test Unsupported Condition Without Initiator 111 Create Bus Isolation Machine 112 113 Register With Condition And Expect Error 114 ... !invalid 115 ... Provided condition is unsupported by ${POSSIBLE_INITIATORS_STRING}: invalid; supported conditions: 'privileged', 'cpuSecure', 'attributionSecure' 116 117Test Unsupported Condition With Initiator 118 Create Bus Isolation Machine 119 120 Register With Condition And Expect Error 121 ... invalid && initiator == cpu0 122 ... Provided condition is unsupported by ${CPU0_INITIATOR_STRING}: invalid; supported conditions: 'privileged', 'cpuSecure', 'attributionSecure' 123 124Test Condition With Initiator Not Supporting States 125 Create Bus Isolation Machine 126 127 Register With Condition And Expect Error 128 ... cpuSecure && initiator == reader2 && !privileged 129 ... Conditions provided (cpuSecure && !privileged) but the initiator 'reader2' doesn't implement IPeripheralWithTransactionState or has no state bits 130 131Test Conditions With Unregistered Initiator 132 Execute Command mach create 133 134 Register With Condition And Expect Error 135 ... cpuSecure && initiator == reader 136 ... Invalid initiator: reader 137 138Test Unregistered Initiator 139 Execute Command mach create 140 141 Register With Condition And Expect Error 142 ... initiator == reader 143 ... Invalid initiator: reader 144 145Test Condition With No Initiators In The Machine 146 Execute Command mach create 147 148 Register With Condition And Expect Error 149 ... !privileged 150 ... Conditions provided (!privileged) but there are no peripherals implementing IPeripheralWithTransactionState or they have no common state bits 151 152Test Conflicting Conditions 153 Create Bus Isolation Machine 154 155 Register With Condition And Expect Error 156 ... cpuSecure && !cpuSecure 157 ... Conditions conflict detected for ${POSSIBLE_INITIATORS_STRING}: cpuSecure 158