1*** Variables ***
2${ADDRESS_REG}                      0
3${VALUE_REG}                        1
4${STATUS_REG}                       2
5
6*** Keywords ***
7Write Opcode
8    [Arguments]                     ${address}  ${opcode}
9    Execute Command                 sysbus WriteDoubleWord ${address} ${opcode}
10
11Compare Store Status
12    [Arguments]                     ${expected}  ${cpu}=0
13    ${value}=                       Execute Command  cpu${cpu} GetRegister ${STATUS_REG}
14    Should Be Equal As Integers     ${value}  ${expected}  Unexpected store status on cpu${cpu}
15
16Compare Memory Content
17    [Arguments]                     ${expected}  ${cpu}=0
18    ${addr}=                        Execute Command  cpu${cpu} GetRegister ${ADDRESS_REG}
19    ${value}=                       Execute Command  sysbus ReadDoubleWord ${addr}
20    Should Be Equal As Integers     ${value}  ${expected}  Unexpected memory value on cpu${cpu}
21
22Step
23    [Arguments]                     ${steps}=1  ${cpu}=0
24    Execute Command                 cpu${cpu} Step ${steps}
25
26Set Value
27    [Arguments]                     ${value}  ${cpu}=0
28    Execute Command                 cpu${cpu} SetRegister ${VALUE_REG} ${value}
29
30Set Address
31    [Arguments]                     ${value}  ${cpu}=0
32    Execute Command                 cpu${cpu} SetRegister ${ADDRESS_REG} ${value}
33
34Create Machine
35    [Arguments]                     ${cpu_count}=1
36    Execute Command                 using sysbus
37    Execute Command                 mach create
38    FOR  ${i}  IN RANGE  ${cpu_count}
39        Execute Command                 machine LoadPlatformDescriptionFromString "cpu${i}: CPU.ARMv7R @ sysbus { cpuType: \\"cortex-r8\\"; cpuId: ${i} }"
40        Execute Command                 cpu${i} ExecutionMode SingleStep
41        Execute Command                 cpu${i} SetRegister ${ADDRESS_REG} 0x1000
42        Execute Command                 cpu${i} PC 0x0
43        Execute Command                 cpu${i} SetRegister ${STATUS_REG} 0x100
44    END
45    Execute Command                 machine LoadPlatformDescriptionFromString "mem: Memory.MappedMemory @ sysbus 0x0 { size: 0x8000000 }"
46
47*** Test Cases ***
48Should Store Exclusive Correctly
49    Create Machine
50
51    Write Opcode                    0x0  0xE1901F9F  # ldrex r1, [r0]
52    Write Opcode                    0x4  0xE3A0100A  # mov r1, #0xA
53    Write Opcode                    0x8  0xE1802F91  # strex r2, r1, [r0]
54
55    Step                            steps=3
56    Compare Store Status            0
57    Compare Memory Content          0xA
58
59Should Not Store Before Load Exclusive
60    Create Machine
61
62    Write Opcode                    0x0  0xE3A0100A  # mov r1, #0xA
63    Write Opcode                    0x4  0xE1802F91  # strex r2, r1, [r0]
64
65    Step                            steps=2
66    Compare Store Status            1
67    Compare Memory Content          0x0
68
69Should Not Store If Value Changed
70    Create Machine
71
72    Write Opcode                    0x0  0xE1901F9F  # ldrex r1, [r0]
73    Write Opcode                    0x4  0xE3A0100A  # mov r1, #0xA
74    Write Opcode                    0x8  0xE5801000  # str r1, [r0]
75    Write Opcode                    0xC  0xE3A0100B  # mov r1, #0xB
76    Write Opcode                    0x10  0xE1802F91  # strex r2, r1, [r0]
77
78    Step                            steps=5
79    Compare Store Status            1
80    # Storing 0xA with normal store and 0xB with the exclusive store. Check if the value was not overriden
81    Compare Memory Content          0xA
82
83Both CPUs Should Store
84    Create Machine                  cpu_count=2
85
86    Write Opcode                    0x0  0xE1901F9F  # ldrex r1, [r0]
87    Write Opcode                    0x4  0xE1802F91  # strex r2, r1, [r0]
88
89    Set Address                     0xAA  cpu=0
90    Set Address                     0xBB  cpu=1
91
92    Step                            cpu=0
93    Step                            cpu=1
94
95    Set Value                       0xA  cpu=0
96    Set Value                       0xB  cpu=1
97
98    Step                            cpu=0
99    Step                            cpu=1
100
101    Compare Store Status            0  cpu=0
102    Compare Memory Content          0xA  cpu=0
103
104    Compare Store Status            0  cpu=1
105    Compare Memory Content          0xB  cpu=1
106
107Second CPU Should Not Store
108    Create Machine                  cpu_count=2
109
110    Write Opcode                    0x0  0xE1901F9F  # ldrex r1, [r0]
111    Write Opcode                    0x4  0xE1802F91  # strex r2, r1, [r0]
112
113    Step                            cpu=0
114    Step                            cpu=1
115
116    Set Value                       0xA  cpu=0
117    Set Value                       0xB  cpu=1
118
119    Step                            cpu=0
120    Step                            cpu=1
121
122    Compare Store Status            0  cpu=0
123    Compare Memory Content          0xA  cpu=0
124
125    Compare Store Status            1  cpu=1
126    Compare Memory Content          0xA  cpu=1
127
128First CPU Should Not Store
129    Create Machine                  cpu_count=2
130
131    Write Opcode                    0x0  0xE1901F9F  # ldrex r1, [r0]
132    Write Opcode                    0x4  0xE1802F91  # strex r2, r1, [r0]
133
134    Step                            cpu=0
135    Step                            cpu=1
136
137    Set Value                       0xA  cpu=0
138    Set Value                       0xB  cpu=1
139
140    Step                            cpu=1
141    Step                            cpu=0
142
143    Compare Store Status            1  cpu=0
144    Compare Memory Content          0xB  cpu=0
145
146    Compare Store Status            0  cpu=1
147    Compare Memory Content          0xB  cpu=1
148
149Should Serialize Atomic State
150    Create Machine                  cpu_count=2
151
152    Write Opcode                    0x0  0xE1901F9F  # ldrex r1, [r0]
153    Write Opcode                    0x4  0xE1802F91  # strex r2, r1, [r0]
154
155    Set Address                     0xAA  cpu=0
156    Set Address                     0xBB  cpu=1
157
158    Step                            cpu=0
159    Step                            cpu=1
160
161    Provides                        registration-pass
162
163Should Use Serialized Atomic State And Store Succesfully
164    Requires                        registration-pass
165    Execute Command                 cpu0 ExecutionMode SingleStep
166    Execute Command                 cpu1 ExecutionMode SingleStep
167
168    Set Value                       0xA  cpu=0
169    Set Value                       0xB  cpu=1
170
171    Step                            cpu=0
172    Step                            cpu=1
173
174    Compare Store Status            0  cpu=0
175    Compare Memory Content          0xA  cpu=0
176
177    Compare Store Status            0  cpu=1
178    Compare Memory Content          0xB  cpu=1
179