1*** Variables ***
2${URI}                             @https://dl.antmicro.com/projects/renode
3${FASTVDMA_SOCKET_LINUX}           ${URI}/Vfastvdma-Linux-x86_64-12904733885-s_1651016-da5e31f75673a48f4d6fbaa5b5f21fd9190df393
4${FASTVDMA_SOCKET_WINDOWS}         ${URI}/Vfastvdma-Windows-x86_64-12904733885.exe-s_3259432-da445f10460a1d6f48d470a5c631e6339a589190
5${FASTVDMA_SOCKET_MACOS}           ${URI}/Vfastvdma-macOS-x86_64-12904733885-s_239216-3c4f0c697d39916c5fc14ee560385336b4fcc062
6${FASTVDMA_NATIVE_LINUX}           ${URI}/libVfastvdma-Linux-x86_64-12904733885.so-s_2104432-8ec57bdee00c76a044024158525d4130af0afc1a
7${FASTVDMA_NATIVE_WINDOWS}         ${URI}/libVfastvdma-Windows-x86_64-12904733885.dll-s_3265828-0e1691527cfb633cf5d8865f3445529708e73f8f
8${FASTVDMA_NATIVE_MACOS}           ${URI}/libVfastvdma-macOS-x86_64-12904733885.dylib-s_239144-ebd397eb4d74c08be26cec08c022e90b78f0e020
9${RAM_SOCKET_LINUX}                ${URI}/Vram-Linux-x86_64-12904733885-s_1634672-820a0d6d950a74702808d07ad15a7f8a48f86fe0
10${RAM_SOCKET_WINDOWS}              ${URI}/Vram-Windows-x86_64-12904733885.exe-s_3245365-7151d2803f710e3f411483352aa822f63a3f405a
11${RAM_SOCKET_MACOS}                ${URI}/Vram-macOS-x86_64-12904733885-s_222840-ef7dd5bc27d5e7b13d0444491f2f1f0fb252052e
12${RAM_NATIVE_LINUX}                ${URI}/libVram-Linux-x86_64-12904733885.so-s_2088056-004e8ca045d4505d42f552b12f0408c9eb951e8a
13${RAM_NATIVE_WINDOWS}              ${URI}/libVram-Windows-x86_64-12904733885.dll-s_3252274-06f5f9b70593f9d57546c9be97791d70c9762129
14${RAM_NATIVE_MACOS}                ${URI}/libVram-macOS-x86_64-12904733885.dylib-s_222776-56574ab2821c56a41486c0233d494d7e841c57df
15
16*** Keywords ***
17Create Machine
18    [Arguments]         ${use_socket}
19    IF      ${use_socket}
20        Set Test Variable   ${dma_args}             ; address: "127.0.0.1"
21        Set Test Variable   ${fastvdma_linux}       ${FASTVDMA_SOCKET_LINUX}
22        Set Test Variable   ${fastvdma_windows}     ${FASTVDMA_SOCKET_WINDOWS}
23        Set Test Variable   ${fastvdma_macos}       ${FASTVDMA_SOCKET_MACOS}
24        Set Test Variable   ${mem_args}             ; address: "127.0.0.1"
25        Set Test Variable   ${ram_linux}            ${RAM_SOCKET_LINUX}
26        Set Test Variable   ${ram_windows}          ${RAM_SOCKET_WINDOWS}
27        Set Test Variable   ${ram_macos}            ${RAM_SOCKET_MACOS}
28    ELSE
29        ${dma_args}=                                Evaluate  ""
30        Set Test Variable   ${fastvdma_linux}       ${FASTVDMA_NATIVE_LINUX}
31        Set Test Variable   ${fastvdma_windows}     ${FASTVDMA_NATIVE_WINDOWS}
32        Set Test Variable   ${fastvdma_macos}       ${FASTVDMA_NATIVE_MACOS}
33        ${mem_args}=                                Evaluate  ""
34        Set Test Variable   ${ram_linux}            ${RAM_NATIVE_LINUX}
35        Set Test Variable   ${ram_windows}          ${RAM_NATIVE_WINDOWS}
36        Set Test Variable   ${ram_macos}            ${RAM_NATIVE_MACOS}
37    END
38
39    Execute Command                             using sysbus
40    Execute Command                             mach create
41    Execute Command                             machine LoadPlatformDescriptionFromString 'cpu: CPU.RiscV32 @ sysbus { cpuType: "rv32imaf"; timeProvider: empty }'
42    Execute Command                             machine LoadPlatformDescriptionFromString 'dma: CoSimulated.CoSimulatedPeripheral @ sysbus <0x10000000, +0x100> { frequency: 100000; limitBuffer: 10000; timeout: 240000 ${dma_args} }'
43    Execute Command                             machine LoadPlatformDescriptionFromString 'mem: CoSimulated.CoSimulatedPeripheral @ sysbus <0x20000000, +0x100000> { frequency: 100000; limitBuffer: 10000; timeout: 240000 ${mem_args} }'
44    Execute Command                             machine LoadPlatformDescriptionFromString 'ram: Memory.MappedMemory @ sysbus 0xA0000000 { size: 0x06400000 }'
45    Execute Command                             sysbus WriteDoubleWord 0xA2000000 0x10500073   # wfi
46    Execute Command                             cpu PC 0xA2000000
47    Execute Command                             dma SimulationFilePathLinux ${fastvdma_linux}
48    Execute Command                             dma SimulationFilePathWindows ${fastvdma_windows}
49    Execute Command                             dma SimulationFilePathMacOS ${fastvdma_macos}
50    Execute Command                             mem SimulationFilePathLinux ${ram_linux}
51    Execute Command                             mem SimulationFilePathWindows ${ram_windows}
52    Execute Command                             mem SimulationFilePathMacOS ${ram_macos}
53Transaction Should Finish
54    ${val} =            Execute Command         dma ReadDoubleWord 0x4
55    Should Contain      ${val}                  0x00000000
56
57
58Prepare Data
59    [Arguments]         ${addr}
60
61    # dummy data for verification
62    ${addr} =                                   Evaluate  ${addr} + 0x0
63    Execute Command                             sysbus WriteDoubleWord ${addr} 0xDEADBEA7
64    ${addr} =                                   Evaluate  ${addr} + 0x4
65    Execute Command                             sysbus WriteDoubleWord ${addr} 0xDEADC0DE
66    ${addr} =                                   Evaluate  ${addr} + 0x4
67    Execute Command                             sysbus WriteDoubleWord ${addr} 0xCAFEBABE
68    ${addr} =                                   Evaluate  ${addr} + 0x4
69    Execute Command                             sysbus WriteDoubleWord ${addr} 0x5555AAAA
70
71
72Configure DMA
73    [Arguments]         ${src}
74    ...                 ${dst}
75    # reader start address
76    Execute Command                             dma WriteDoubleWord 0x10 ${src}
77    # reader line length in 32-bit words
78    Execute Command                             dma WriteDoubleWord 0x14 1024
79    # number of lines to read
80    Execute Command                             dma WriteDoubleWord 0x18 1
81    # stride size between consecutive lines in 32-bit words
82    Execute Command                             dma WriteDoubleWord 0x1c 0
83
84    # writer start address
85    Execute Command                             dma WriteDoubleWord 0x20 ${dst}
86    # writer line length in 32-bit words
87    Execute Command                             dma WriteDoubleWord 0x24 1024
88    # number of lines to write
89    Execute Command                             dma WriteDoubleWord 0x28 1
90    # stride size between consecutive lines in 32-bit words
91    Execute Command                             dma WriteDoubleWord 0x2c 0
92
93    # do not wait fo external synchronization signal
94    Execute Command                             dma WriteDoubleWord 0x00 0x0f
95
96
97Ensure Memory Is Clear
98    [Arguments]         ${periph}
99
100    # Verify that there are 0's under the writer start address before starting the transaction
101    Memory Should Contain                       ${periph}  0x0  0x00000000
102    Memory Should Contain                       ${periph}  0x4  0x00000000
103    Memory Should Contain                       ${periph}  0x8  0x00000000
104    Memory Should Contain                       ${periph}  0xC  0x00000000
105
106
107Ensure Memory Is Written
108    [Arguments]         ${periph}
109
110    # Verify data after the transaction
111    Memory Should Contain                       ${periph}  0x0  0xDEADBEA7
112    Memory Should Contain                       ${periph}  0x4  0xDEADC0DE
113    Memory Should Contain                       ${periph}  0x8  0xCAFEBABE
114    Memory Should Contain                       ${periph}  0xC  0x5555AAAA
115
116
117Memory Should Contain
118    [Arguments]         ${periph}
119    ...                 ${addr}
120    ...                 ${val}
121    ${res}=             Execute Command         ${periph} ReadDoubleWord ${addr}
122    Should Contain                              ${res}             ${val}
123
124Test Read Write Co-simulated Memory
125    Ensure Memory Is Clear                      mem
126
127    # Write to memory
128    Prepare Data                                0x20000000
129
130    Ensure Memory Is Written                    mem
131
132Test DMA Transaction From Mapped Memory to Mapped Memory
133    Prepare Data                                0xA1000000
134
135    Configure DMA                               0xA1000000  0xA0000000
136
137    Ensure Memory Is Clear                      ram
138
139    Execute Command                             emulation RunFor "00:00:10.000000"
140    Transaction Should Finish
141
142    Ensure Memory Is Written                    ram
143
144Test DMA Transaction From Mapped Memory to Co-simulated Memory
145    Prepare Data                                0xA1000000
146
147    Configure DMA                               0xA1000000  0x20000000
148
149    Ensure Memory Is Clear                      mem
150
151    Execute Command                             emulation RunFor "00:00:10.000000"
152    Transaction Should Finish
153
154    Ensure Memory Is Written                    mem
155
156Test DMA Transaction From Co-simulated Memory to Mapped Memory
157    Prepare Data                                0x20080000
158
159    Configure DMA                               0x20080000  0xA0000000
160
161    Ensure Memory Is Clear                      ram
162
163    Execute Command                             emulation RunFor "00:00:10.000000"
164    Transaction Should Finish
165
166    Ensure Memory Is Written                    ram
167
168Test DMA Transaction From Co-simulated Memory to Co-simulated Memory
169    Prepare Data                                0x20080000
170
171    Configure DMA                               0x20080000  0x20000000
172
173    Ensure Memory Is Clear                      mem
174
175    Execute Command                             emulation RunFor "00:00:10.000000"
176    Transaction Should Finish
177
178    Ensure Memory Is Written                    mem
179
180*** Test Cases ***
181Should Read Write Co-simulated Memory Using Socket
182    [Tags]                          skip_host_arm
183    Create Machine      True
184    Test Read Write Co-simulated Memory
185
186Should Run DMA Transaction From Mapped Memory to Mapped Memory Using Socket
187    [Tags]                          skip_host_arm
188    Create Machine      True
189    Test DMA Transaction From Mapped Memory to Mapped Memory
190
191Should Run DMA Transaction From Mapped Memory to Co-simulated Memory Using Socket
192    [Tags]                          skip_host_arm
193    Create Machine      True
194    Test DMA Transaction From Mapped Memory to Co-simulated Memory
195
196Should Run DMA Transaction From Co-simulated Memory to Mapped Memory Using Socket
197    [Tags]                          skip_host_arm
198    Create Machine      True
199    Test DMA Transaction From Co-simulated Memory to Mapped Memory
200
201Should Run DMA Transaction From Co-simulated Memory to Co-simulated Memory Using Socket
202    [Tags]                          skip_host_arm
203    Create Machine      True
204    Test DMA Transaction From Co-simulated Memory to Co-simulated Memory
205
206Should Read Write Co-simulated Memory
207    [Tags]                          skip_osx  skip_host_arm
208    Create Machine      False
209    Test Read Write Co-simulated Memory
210
211Should Run DMA Transaction From Mapped Memory to Mapped Memory
212    [Tags]                          skip_osx  skip_host_arm
213    Create Machine      False
214    Test DMA Transaction From Mapped Memory to Mapped Memory
215
216Should Run DMA Transaction From Mapped Memory to Co-simulated Memory
217    [Tags]                          skip_osx  skip_host_arm
218    Create Machine      False
219    Test DMA Transaction From Mapped Memory to Co-simulated Memory
220
221Should Run DMA Transaction From Co-simulated Memory to Mapped Memory
222    [Tags]                          skip_osx  skip_host_arm
223    Create Machine      False
224    Test DMA Transaction From Co-simulated Memory to Mapped Memory
225
226Should Run DMA Transaction From Co-simulated Memory to Co-simulated Memory
227    [Tags]                          skip_osx  skip_host_arm
228    Create Machine      False
229    Test DMA Transaction From Co-simulated Memory to Co-simulated Memory
230