1*** Keywords *** 2Create Platform 3 Execute Command using sysbus 4 5 Execute Command mach create 6 Execute Command machine LoadPlatformDescription @platforms/cpus/litex_vexriscv_smp.repl 7 8 Execute Command sysbus LoadBinary @https://dl.antmicro.com/projects/renode/litex_vexriscv_smp--opensbi.bin-s_45360-dcfe5f7b149bd1e0232609d87fb698f95f5e33c4 0x40F00000 9 Execute Command sysbus LoadBinary @https://dl.antmicro.com/projects/renode/litex_vexriscv_smp--linux_kernel.bin-s_3009892-d77e1e2a896ab0767452ee9b1186e117b606ba39 0x40000000 10 Execute Command sysbus LoadBinary @https://dl.antmicro.com/projects/renode/litex_vexriscv_smp--device_tree.dtb-s_1703-ebe07ee2f4e15760ae9b13483a51d241cab20002 0x40EF0000 11 Execute Command sysbus LoadBinary @https://dl.antmicro.com/projects/renode/litex_vexriscv_smp--rootfs.cpio-s_4570112-7a6a6388e09170db38795a006dd75f91d556eecf 0x41000000 12 13 Execute Command cpu_0 PC 0x40F00000 14 Execute Command cpu_1 PC 0x40F00000 15 Execute Command cpu_2 PC 0x40F00000 16 Execute Command cpu_3 PC 0x40F00000 17 18 19*** Test Cases *** 20Should Run OpenSBI 21 Create Platform 22 Create Terminal Tester sysbus.uart 23 Execute Command showAnalyzer sysbus.uart 24 25 Start Emulation 26 27 Wait For Line On Uart OpenSBI v0.6 28 Wait For Line On Uart Litex/VexRiscv SMP 29 Wait For Line On Uart Platform Max HARTs\\s+ : 4 treatAsRegex=True 30 31 32Should Boot Linux 33 [Tags] non_critical 34 35 Create Platform 36 Create Terminal Tester sysbus.uart 37 Execute Command showAnalyzer sysbus.uart 38 39 Start Emulation 40 41 Wait For Line On Uart Linux version 5.0.9 42 Wait For Line On Uart smp: Brought up 1 node, 4 CPUs 43 Wait For Line On Uart Welcome to Buildroot timeout=16 44 45 Wait For Prompt On Uart buildroot login: 46 Write Line To Uart root 47 48 Wait For Prompt On Uart root@buildroot:~# 49 Write Line To Uart cat /proc/cpuinfo 50 51 Wait For Line On Uart processor\t: 0 52 Wait For Line On Uart processor\t: 1 53 Wait For Line On Uart processor\t: 2 54 Wait For Line On Uart processor\t: 3 55 56