1*** Test Cases ***
2Should Run Tock
3    Execute Command             include @scripts/single-node/litex_vexriscv_tock.resc
4    Create Terminal Tester      sysbus.uart
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6    Start Emulation
7    Wait For Line On Uart       LiteX+VexRiscv on ArtyA7: initialization complete, entering main loop.
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9    Wait For Line On Uart       D1 says hello
10    Wait For Line On Uart       D2 says hello
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12    Wait For Line On Uart       D1 says hello
13    Wait For Line On Uart       D2 says hello
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15    Wait For Line On Uart       D1 says hello
16    Wait For Line On Uart       D2 says hello
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