1*** Variables ***
2${UART}                             sysbus.uart0
3${PROMPT}                           \#${SPACE}
4${URL}                              https://dl.antmicro.com/projects/renode
5${TEST_TEXT}                        Lorem ipsum dolor sit amet, consectetur adipiscing elit, sed do eiusmod tempor incididunt ut labore et dolore magna aliqua. Ut enim ad minim veniam, quis nostrud exercitation ullamco laboris nisi ut aliquip ex ea commodo consequat. Duis aute irure dolor in reprehenderit in voluptate velit esse cillum dolore eu fugiat nulla pariatur. Excepteur sint occaecat cupidatat non proident, sunt in culpa qui officia deserunt mollit anim id est laborum.
6
7${MULTICORE_ZYNQ_7000}=     SEPARATOR=
8...  """                                                        ${\n}
9...  using "platforms/cpus/zynq-7000.repl"                      ${\n}
10...                                                             ${\n}
11...  cpu1: CPU.ARMv7A @ sysbus                                  ${\n}
12...  ${SPACE*4}cpuType: "cortex-a9"                             ${\n}
13...  ${SPACE*4}genericInterruptController: gic                  ${\n}
14...  ${SPACE*4}cpuId: 1                                         ${\n}
15...                                                             ${\n}
16...  privateTimer1: Timers.ARM_PrivateTimer @ {                 ${\n}
17...  ${SPACE*4}${SPACE*4}sysbus new Bus.BusPointRegistration {  ${\n}
18...  ${SPACE*4}${SPACE*4}${SPACE*4}address: 0xF8F00600;         ${\n}
19...  ${SPACE*4}${SPACE*4}${SPACE*4}cpu: cpu1                    ${\n}
20...  ${SPACE*4}${SPACE*4}}                                      ${\n}
21...  ${SPACE*4}}                                                ${\n}
22...  ${SPACE*4}-> gic#1@29                                      ${\n}
23...  ${SPACE*4}frequency: 667000000                             ${\n}
24...                                                             ${\n}
25...  gic:                                                       ${\n}
26...  ${SPACE*4}\[4-5\] -> cpu1@\[0-1\]                          ${\n}
27...                                                             ${\n}
28...  slcr:                                                      ${\n}
29...  ${SPACE*4}cpu1: cpu1                                       ${\n}
30...  """
31
32*** Keywords ***
33Create Machine
34    Execute Command                 using sysbus
35    Execute Command                 mach create
36    Execute Command                 machine LoadPlatformDescriptionFromString ${MULTICORE_ZYNQ_7000}
37    Execute Command                 sysbus Redirect 0xC0000000 0x0 0x10000000
38
39    # Set timer frequency
40    Execute Command                 ttc0 Frequency 33333333
41    Execute Command                 ttc1 Frequency 33333333
42
43    # Setup CPUs
44    Execute Command                 cpu SetRegister 0 0x000
45    Execute Command                 cpu SetRegister 1 0xD32 # processor variant (cortex-a9)
46    Execute Command                 cpu SetRegister 2 0x100 # device tree address
47    Execute Command                 cpu1 IsHalted true
48
49    Execute Command                 sysbus LoadELF @${URL}/zynq-interface-tests-vmlinux-s_14142952-ab5cd7445f31414fcbf8c79d49d737c669034ef2
50    Execute Command                 sysbus LoadFdt @${URL}/zynq-interface-tests.dtb-s_11724-984776b955e46b2d8f4426552a4c1ae91d063e4b 0x100 "console=ttyPS0,115200 root=/dev/ram0 rw initrd=0x1a000000,16M" false
51    Execute Command                 sysbus ZeroRange 0x1a000000 0x800000
52    Execute Command                 sysbus LoadBinary @${URL}/zynq--interface-tests-rootfs.ext2-s_16777216-191638e3b3832a81bebd21d555f67bf3a4d7882a 0x1a000000
53
54*** Test Cases ***
55Should Force Interrupt Only To Lowest Id CPU
56    Execute Command                 emulation SetGlobalSerialExecution true
57    Execute Command                 emulation SetAdvanceImmediately true
58    Execute Command                 logLevel 3
59    Create Machine
60    Create Terminal Tester          ${UART}  defaultPauseEmulation=True
61
62    # boot linux
63    Wait For Line On Uart           Booting Linux on physical CPU 0x0
64    Wait For Prompt On Uart         buildroot login:  timeout=25
65    Write Line To Uart              root
66    Wait For Prompt On Uart         ${PROMPT}
67
68    # enable UART interrupt (0x3B) to target core 0 and 1
69    Execute Command                 sysbus WriteDoubleWord 0xF8F01838 0x03010101 cpu
70
71    Create Log Tester               1
72    Execute Command                 logLevel -1 gic
73
74    Write Line To Uart              echo ${TEST_TEXT}  waitForEcho=False
75    Write Line To Uart              echo ${TEST_TEXT}  waitForEcho=False
76    # # confirm cpu1 can handle UART's IRQ - 59 (SPI 27)
77    Wait For Log Entry              gic: cpu1.0.0.0 reads from 0xC (InterruptAcknowledge) register of memory-mapped CPU Interface, returned 0x3B.  keep=True  pauseEmulation=True
78    # # confirm cpu0 can handle UART's IRQ
79    Wait For Log Entry              gic: cpu0.0.0.0 reads from 0xC (InterruptAcknowledge) register of memory-mapped CPU Interface, returned 0x3B.  keep=True  pauseEmulation=True
80
81    Execute Command                 gic ForceLowestIdCpuAsInterruptTarget true
82
83    # create new tester to clear log history
84    Create Log Tester               1
85    Execute Command                 logLevel -1 gic
86    # confirm cpu1 cannot handle UART's IRQ
87    Write Line To Uart              echo ${TEST_TEXT}  waitForEcho=False
88    Should Not Be In Log            gic: cpu1.0.0.0 reads from 0xC (InterruptAcknowledge) register of memory-mapped CPU Interface, returned 0x3B.
89    Wait For Log Entry              gic: cpu0.0.0.0 reads from 0xC (InterruptAcknowledge) register of memory-mapped CPU Interface, returned 0x3B.
90