1nvic: IRQControllers.NVIC @ sysbus new Bus.BusPointRegistration { 2 address: 0xE000E000; 3 cpu: cpu 4 } 5 -> cpu@0 6 systickFrequency: 38400000 7 8cpu: CPU.CortexM @ sysbus 9 nvic: nvic 10 cpuType: "cortex-m33" 11 cpuId: 0 12 13flash: Memory.MappedMemory @ sysbus 0x00000000 14 size: 0x80000 15 16sram: Memory.MappedMemory @ sysbus 0x20000000 17 size: 0x8000 18 19seqram: Memory.MappedMemory @ { 20 sysbus 0xA0000000; // SEQRAM_S 21 sysbus 0xB0000000 // SEQRAM_NS 22 } 23 size: 0x4000 24 25frcram: Memory.MappedMemory @ { 26 sysbus 0xA0004000; // FRCRAM_S 27 sysbus 0xB0004000 // FRCRAM_NS 28 } 29 size: 0x1000 30 31pkram: Memory.MappedMemory @ { 32 sysbus 0x4C028000; // PKRAM_MAIN_S 33 sysbus 0x5C028000 // PKRAM_MAIN_NS 34 } 35 size: 0x2000 // TODO: according to the CMSIS header, this should be 0x1000 36 37bitclear: Miscellaneous.BitAccess 38 address: 0x2000 39 mode: BitAccessMode.Clear 40 41bitset: Miscellaneous.BitAccess 42 address: 0x1000 43 mode: BitAccessMode.Set 44 45i2c0: I2C.EFR32_I2CController @ { 46 sysbus <0x4A010000, +0x4000>; // I2C0_S 47 sysbus <0x5A010000, +0x4000> // I2C0_NS 48 } 49 -> nvic@27 50 51ldma: DMA.EFR32xG22_LDMA @ { 52 sysbus new Bus.BusMultiRegistration { address: 0x40040000; size: 0x4000; region: "ldma" }; // LDMA_S 53 sysbus new Bus.BusMultiRegistration { address: 0x50040000; size: 0x4000; region: "ldma" }; // LDMA_NS 54 sysbus new Bus.BusMultiRegistration { address: 0x40044000; size: 0x4000; region: "ldmaxbar" }; // LDMAXBAR_S 55 sysbus new Bus.BusMultiRegistration { address: 0x50044000; size: 0x4000; region: "ldmaxbar" } // LDMAXBAR_NS 56 } 57 -> nvic@21 58 59usart0: UART.EFR32xG2_USART_0 @ { 60 sysbus <0x4005C000, +0x4000>; // USART0_S 61 sysbus <0x5005C000, +0x4000> // USART0_NS 62 } 63 clockFrequency: 38400000 64 ReceiveIRQ -> nvic@13 65 TransmitIRQ -> nvic@14 66 RxDataAvailableRequest -> ldma@0x0040 67 RxDataAvailableSingleRequest -> ldma@0x1040 68 RxDataAvailableGpioSignal -> gpioPort@0x1201 69 TxBufferLowRequest -> ldma@0x0042 70 TxBufferLowSingleRequest -> ldma@0x1042 71 TxEmptyRequest -> ldma@0x0044 72 73usart1: UART.EFR32xG2_USART_0 @ { 74 sysbus <0x40060000, +0x4000>; // USART1_S 75 sysbus <0x50060000, +0x4000> // USART1_NS 76 } 77 clockFrequency: 38400000 78 ReceiveIRQ -> nvic@15 79 TransmitIRQ -> nvic@16 80 RxDataAvailableRequest -> ldma@0x0050 81 RxDataAvailableSingleRequest -> ldma@0x1050 82 RxDataAvailableGpioSignal -> gpioPort@0x1202 83 TxBufferLowRequest -> ldma@0x0052 84 TxBufferLowSingleRequest -> ldma@0x1052 85 TxEmptyRequest -> ldma@0x0054 86 87// TODO: this should be MSC_1 88msc: Miscellaneous.SiLabs.EFR32xG2_MSC_3 @ { 89 sysbus <0x40030000, +0x4000>; // MSC_S 90 sysbus <0x50030000, +0x4000> // MSC_NS 91 } 92 cpu: cpu 93 IRQ -> nvic@49 94 flashSize: 0x80000 95 flashPageSize: 0x2000 96 97gpioPort: GPIOPort.EFR32xG2_GPIO_1 @ { 98 sysbus <0x4003C000, +0x4000>; // GPIO_S 99 sysbus <0x5003C000, +0x4000> // GPIO_NS 100 } 101 OddIRQ -> nvic@25 102 EvenIRQ -> nvic@26 103 104// TODO: this should be TIMER_0 105timer0: Timers.EFR32xG2_TIMER_1 @ { 106 sysbus <0x40048000, +0x4000>; // TIMER0_S 107 sysbus <0x50048000, +0x4000> // TIMER0_NS 108 } 109 frequency: 38400000 110 width: 16 111 -> nvic@7 112 113// TODO: this should be TIMER_0 114timer1: Timers.EFR32xG2_TIMER_1 @ { 115 sysbus <0x4004C000, +0x4000>; // TIMER1_S 116 sysbus <0x5004C000, +0x4000> // TIMER1_NS 117 } 118 frequency: 38400000 119 width: 16 120 -> nvic@8 121 122// TODO: this should be TIMER_0 123timer2: Timers.EFR32xG2_TIMER_1 @ { 124 sysbus <0x40050000, +0x4000>; // TIMER2_S 125 sysbus <0x50050000, +0x4000> // TIMER2_NS 126 } 127 frequency: 38400000 128 width: 16 129 -> nvic@9 130 131// TODO: this should be TIMER_0 132timer3: Timers.EFR32xG2_TIMER_1 @ { 133 sysbus <0x40054000, +0x4000>; // TIMER3_S 134 sysbus <0x50054000, +0x4000> // TIMER3_NS 135 } 136 frequency: 38400000 137 width: 16 138 -> nvic@10 139 140// TODO: this should be TIMER_0 141timer4: Timers.EFR32xG2_TIMER_1 @ { 142 sysbus <0x40058000, +0x4000>; // TIMER4_S 143 sysbus <0x50058000, +0x4000> // TIMER4_NS 144 } 145 frequency: 38400000 146 width: 16 147 -> nvic@11 148 149wtimer0: Timers.EFR32_Timer @ { 150 sysbus <0x4A018000, +0x4000>; // WDOG0_S 151 sysbus <0x5A018000, +0x4000> // WDOG0_NS 152 } 153 frequency: 0x1000000 //bogus 154 width: TimerWidth.Bit32 155 -> nvic@43 156 157// TODO: unclear what version of this block should be used here 158deviceInformation: Miscellaneous.SiLabs.EFR32xG2_DeviceInformation @ sysbus 0x0FE08000 159 // TODO: change this to BG22 once the DeviceFamily enum is updated 160 deviceFamily: DeviceFamily.EFR32MG24 161 deviceNumber: 0x1 162 flashDevice: flash 163 sramDevice: sram 164 165DCDC_IF: Python.PythonPeripheral @ sysbus 0x50094024 166 size: 0x4 167 initable: true 168 script: "request.value = 0xffffffff" 169 170// TODO: this should be CMU_1 171cmu: Miscellaneous.SiLabs.EFR32xG2_CMU_3 @ { 172 sysbus <0x40008000, +0x4000>; // CMU_S 173 sysbus <0x50008000, +0x4000> // CMU_NS 174 } 175 hfxo: hfxo 176 177// TODO: this should be HFRCO_1 178hfrco0: Miscellaneous.SiLabs.EFR32xG2_HFRCO_2 @ { 179 sysbus <0x40010000, +0x4000>; // HFRCO0_S 180 sysbus <0x50010000, +0x4000> // HFRCO0_NS 181 } 182 183hfxo: Miscellaneous.SiLabs.EFR32xG2_HFXO_2 @ { 184 sysbus <0x4000C000, +0x4000>; // HFXO0_S 185 sysbus <0x5000C000, +0x4000> // HFXO0_NS 186 } 187 startupDelayTicks: 3 //should remain <= 20 to pass early wakeup conditions 188 IRQ -> nvic@44 189 190// TODO: this should be EMU_1 191emu: Miscellaneous.SiLabs.EFR32xG2_EMU_3 @ { 192 sysbus <0x40004000, +0x4000>; // EMU_S 193 sysbus <0x50004000, +0x4000> // EMU_NS 194 } 195 196smu: Miscellaneous.SiLabs.EFR32xG2_SMU_1 @ { 197 sysbus new Bus.BusMultiRegistration { address: 0x44008000; size: 0x4000; region: "smu_s" }; // SMU_S 198 sysbus new Bus.BusMultiRegistration { address: 0x54008000; size: 0x4000; region: "smu_ns" } // SMU_NS 199 } 200 SecureIRQ -> nvic@3 201 SecurePriviledgedIRQ -> nvic@4 202 NonSecurePriviledgedIRQ -> nvic@5 203 204// TODO: this should be SYSCFG_1 205syscfg: Miscellaneous.SiLabs.EFR32xG2_SYSCFG_3 @ { 206 sysbus <0x4007C000, +0x4000>; // SYSCFG_S 207 sysbus <0x5007C000, +0x4000> // SYSCFG_NS 208 } 209 210radioaes: Miscellaneous.SiLabs.EFR32xG2_AES_1 @ { 211 sysbus <0x44000000, +0x7FF>; // RADIOAES_S 212 sysbus <0x54000000, +0x7FF> // RADIOAES_NS 213 } 214 IRQ -> nvic@47 215 216cryptoacc_rngctrl: Miscellaneous.SiLabs.EFR32xG2_RNGCTRL @ { 217 sysbus new Bus.BusMultiRegistration { address: 0x4C021000; size: 0x7FF; region: "rngctrl_s" }; // CRYPTOACC_RNGCTRL_S 218 sysbus new Bus.BusMultiRegistration { address: 0x5C021000; size: 0x7FF; region: "rngctrl_ns" }; // CRYPTOACC_RNGCTRL_NS 219 sysbus new Bus.BusMultiRegistration { address: 0x4C024000; size: 0x4000; region: "rngfifo_s" }; // CRYPTOACC_RNGOUT_FIFO_S 220 sysbus new Bus.BusMultiRegistration { address: 0x5C024000; size: 0x4000; region: "rngfifo_ns" } // CRYPTOACC_RNGOUT_FIFO_NS 221 } 222 IRQ -> nvic@0 223 224itm : Miscellaneous.SiLabs.EFR32xG2_SLAB_ITM @ sysbus 0xE0000000 225 226sysbus: 227 init add: 228 Tag <0x40004000, 0x40007FFF> "EMU_S" 229 Tag <0x40008000, 0x4000BFFF> "CMU_S" 230 Tag <0x4000C000, 0x4000FFFF> "HFXO0_S" 231 Tag <0x40010000, 0x40013FFF> "HFRCO0_S" 232 Tag <0x40018000, 0x4001BFFF> "FSRCO_S" 233 Tag <0x4001C000, 0x4001FFFF> "DPLL0_S" 234 Tag <0x40020000, 0x40023FFF> "LFXO_S" 235 Tag <0x40024000, 0x40027FFF> "LFRCO_S" 236 Tag <0x40028000, 0x4002BFFF> "ULFRCO_S" 237 Tag <0x40030000, 0x40033FFF> "MSC_S" 238 Tag <0x40034000, 0x40037FFF> "ICACHE0_S" 239 Tag <0x40038000, 0x4003BFFF> "PRS_S" 240 Tag <0x4003C000, 0x4003FFFF> "GPIO_S" 241 Tag <0x40040000, 0x40043FFF> "LDMA_S" 242 Tag <0x40044000, 0x40047FFF> "LDMAXBAR_S" 243 Tag <0x40048000, 0x4004BFFF> "TIMER0_S" 244 Tag <0x4004C000, 0x4004FFFF> "TIMER1_S" 245 Tag <0x40050000, 0x40053FFF> "TIMER2_S" 246 Tag <0x40054000, 0x40057FFF> "TIMER3_S" 247 Tag <0x40058000, 0x4005BFFF> "TIMER4_S" 248 Tag <0x4005C000, 0x4005FFFF> "USART0_S" 249 Tag <0x40060000, 0x40063FFF> "USART1_S" 250 Tag <0x40064000, 0x40067FFF> "BURTC_S" 251 Tag <0x40068000, 0x4006BFFF> "I2C1_S" 252 Tag <0x40078000, 0x4007BFFF> "SYSCFG_S" 253 Tag <0x4007C000, 0x4007FFFF> "SYSCFG2_S" 254 Tag <0x40080000, 0x40083FFF> "BURAM_S" 255 Tag <0x40088000, 0x4008BFFF> "GPCRC_S" 256 Tag <0x40094000, 0x40097FFF> "DCDC_S" 257 Tag <0x40098000, 0x4009BFFF> "PDM_S" 258 Tag <0x4009C000, 0x4009FFFF> "RFSENSE_S" 259 Tag <0x44000000, 0x440007FF> "RADIOAES_S" 260 Tag <0x44008000, 0x4400BFFF> "SMU_S" 261 Tag <0x4400C000, 0x4400FFFF> "SMU2_S" 262 Tag <0x48000000, 0x48003FFF> "RTCC_S" 263 Tag <0x4A000000, 0x4A003FFF> "LETIMER0_S" 264 Tag <0x4A004000, 0x4A007FFF> "IADC0_S" 265 Tag <0x4A010000, 0x4A013FFF> "I2C0_S" 266 Tag <0x4A018000, 0x4A01BFFF> "WDOG0_S" 267 Tag <0x4A030000, 0x4A033FFF> "EUART0_S" 268 Tag <0x4C020000, 0x4C0207FF> "CRYPTOACC_S" 269 Tag <0x4C021000, 0x4C02107F> "CRYPTOACC_RNGCTRL_S" 270 Tag <0x4C022000, 0x4C02201F> "CRYPTOACC_PKCTRL_S" 271 Tag <0x4C024000, 0x4C027FFF> "RNGOUT_FIFO_S" 272 Tag <0x4C028000, 0x4C028FFF> "PKRAM_MAIN_S" 273 Tag <0x50004000, 0x50007FFF> "EMU_NS" 274 Tag <0x50008000, 0x5000BFFF> "CMU_NS" 275 Tag <0x5000C000, 0x5000FFFF> "HFXO0_NS" 276 Tag <0x50010000, 0x50013FFF> "HFRCO0_NS" 277 Tag <0x50018000, 0x5001BFFF> "FSRCO_NS" 278 Tag <0x5001C000, 0x5001FFFF> "DPLL0_NS" 279 Tag <0x50020000, 0x50023FFF> "LFXO_NS" 280 Tag <0x50024000, 0x50027FFF> "LFRCO_NS" 281 Tag <0x50028000, 0x5002BFFF> "ULFRCO_NS" 282 Tag <0x50030000, 0x50033FFF> "MSC_NS" 283 Tag <0x50034000, 0x50037FFF> "ICACHE0_NS" 284 Tag <0x50038000, 0x5003BFFF> "PRS_NS" 285 Tag <0x5003C000, 0x5003FFFF> "GPIO_NS" 286 Tag <0x50040000, 0x50043FFF> "LDMA_NS" 287 Tag <0x50044000, 0x50047FFF> "LDMAXBAR_NS" 288 Tag <0x50048000, 0x5004BFFF> "TIMER0_NS" 289 Tag <0x5004C000, 0x5004FFFF> "TIMER1_NS" 290 Tag <0x50050000, 0x50053FFF> "TIMER2_NS" 291 Tag <0x50054000, 0x50057FFF> "TIMER3_NS" 292 Tag <0x50058000, 0x5005BFFF> "TIMER4_NS" 293 Tag <0x5005C000, 0x5005FFFF> "USART0_NS" 294 Tag <0x50060000, 0x50063FFF> "USART1_NS" 295 Tag <0x50064000, 0x50067FFF> "BURTC_NS" 296 Tag <0x50068000, 0x5006BFFF> "I2C1_NS" 297 Tag <0x50078000, 0x5007BFFF> "SYSCFG_NS" 298 Tag <0x5007C000, 0x5007FFFF> "SYSCFG2_NS" 299 Tag <0x50080000, 0x50083FFF> "BURAM_NS" 300 Tag <0x50088000, 0x5008BFFF> "GPCRC_NS" 301 Tag <0x50094000, 0x50097FFF> "DCDC_NS" 302 Tag <0x50098000, 0x5009BFFF> "PDM_NS" 303 Tag <0x5009C000, 0x5009FFFF> "RFSENSE_NS" 304 Tag <0x54000000, 0x540007FF> "RADIOAES_NS" 305 Tag <0x54008000, 0x5400BFFF> "SMU_NS" 306 Tag <0x5400C000, 0x5400FFFF> "SMU2_NS" 307 Tag <0x58000000, 0x58003FFF> "RTCC_NS" 308 Tag <0x5A000000, 0x5A003FFF> "LETIMER0_NS" 309 Tag <0x5A004000, 0x5A007FFF> "IADC0_NS" 310 Tag <0x5A010000, 0x5A013FFF> "I2C0_NS" 311 Tag <0x5A018000, 0x5A01BFFF> "WDOG0_NS" 312 Tag <0x5A030000, 0x5A033FFF> "EUART0_NS" 313 Tag <0x5C020000, 0x5C0207FF> "CRYPTOACC_NS" 314 Tag <0x5C021000, 0x5C02107F> "CRYPTOACC_RNGCTRL_NS" 315 Tag <0x5C022000, 0x5C02201F> "CRYPTOACC3_PKCTRL_NS" 316 Tag <0x5C024000, 0x5C027FFF> "RNGOUT_FIFO_NS" 317 Tag <0x5C028000, 0x5C028FFF> "PKRAM_MAIN_NS"