1s7: CPU.RiscV64 @ sysbus 2 cpuType: "rv64imac_zicsr_zifencei" 3 hartId: 0 4 privilegedArchitecture: PrivilegedArchitecture.Priv1_10 5 timeProvider: clint 6 7u74_1: CPU.RiscV64 @ sysbus 8 cpuType: "rv64gc_zicsr_zifencei" 9 hartId: 1 10 privilegedArchitecture: PrivilegedArchitecture.Priv1_10 11 timeProvider: clint 12 13u74_2: CPU.RiscV64 @ sysbus 14 cpuType: "rv64gc_zicsr_zifencei" 15 hartId: 2 16 privilegedArchitecture: PrivilegedArchitecture.Priv1_10 17 timeProvider: clint 18 19u74_3: CPU.RiscV64 @ sysbus 20 cpuType: "rv64gc_zicsr_zifencei" 21 hartId: 3 22 privilegedArchitecture: PrivilegedArchitecture.Priv1_10 23 timeProvider: clint 24 25u74_4: CPU.RiscV64 @ sysbus 26 cpuType: "rv64gc_zicsr_zifencei" 27 hartId: 4 28 privilegedArchitecture: PrivilegedArchitecture.Priv1_10 29 timeProvider: clint 30 31debug: Memory.MappedMemory @sysbus 0x0 32 size: 0x1000 33 34s7DTim: Memory.MappedMemory @ sysbus 0x01000000 35 size: 0x2000 36 37clint: IRQControllers.CoreLevelInterruptor @ sysbus 0x02000000 38 frequency: 1000000 39 numberOfTargets: 5 40 [0, 1] -> s7@[3, 7] 41 [2, 3] -> u74_1@[3, 7] 42 [4, 5] -> u74_2@[3, 7] 43 [6, 7] -> u74_3@[3, 7] 44 [8, 9] -> u74_4@[3, 7] 45 46plic: IRQControllers.PlatformLevelInterruptController @ sysbus 0x0c000000 47 0 -> s7@11 48 [1,2] -> u74_1@[11,9] 49 [3,4] -> u74_2@[11,9] 50 [5,6] -> u74_3@[11,9] 51 [7,8] -> u74_4@[11,9] 52 numberOfSources: 69 53 numberOfContexts: 9 54 prioritiesEnabled : false 55 56uart0: UART.SiFive_UART @ sysbus 0x10010000 57 IRQ -> plic@39 58 59uart1: UART.SiFive_UART @ sysbus 0x10011000 60 IRQ -> plic@40 61 62pwm0: HiFive_PWM @ sysbus 0x10020000 63 IRQ -> plic@44 64 65pwm1: HiFive_PWM @ sysbus 0x10021000 66 IRQ -> plic@48 67 68i2c1: I2C.OpenCoresI2C @ sysbus 0x10030000 69 // our model does not support interrupts yet, but if it did: 70 // IRQ -> plic@52 71 72i2c2: I2C.OpenCoresI2C @ sysbus 0x10031000 73 74qspi0: SPI.HiFive_SPI @ sysbus 0x10040000 75 IRQ -> plic@41 76 numberOfSupportedSlaves: 1 77 78qspi1: SPI.HiFive_SPI @ sysbus 0x10041000 79 IRQ -> plic@42 80 numberOfSupportedSlaves: 4 81 82qspi2: SPI.HiFive_SPI @ sysbus 0x10050000 83 IRQ -> plic@43 84 numberOfSupportedSlaves: 1 85 86gpio: GPIOPort.SiFive_GPIO @ sysbus 0x10060000 87 88ethernet: Network.CadenceGEM @ sysbus 0x10090000 89 moduleRevision: 0x0109 90 moduleId: 0x1007 91 IRQ -> plic@55 92 93phy: Network.EthernetPhysicalLayer @ ethernet 0 94 Id1: 0x0141 95 Id2: 0x0e40 96 BasicStatus: 0x62A4 97 AutoNegotiationAdvertisement: 0x1e1 98 AutoNegotiationLinkPartnerBasePageAbility: 0x1e1 99 MasterSlaveControl: 0x300 100 MasterSlaveStatus: 0x3000 101 102l2Cache: Memory.MappedMemory @ sysbus 0x08000000 103 size: 0x200000 104 105ddr: Memory.MappedMemory @ sysbus 0x80000000 106 size: 0x200000000 107 108sysbus: 109 init: 110 Tag <0x10000004 0x4> "PRCI:core_pllcfg" 0xFFFFFFFF 111 Tag <0x1000000C 0x4> "PRCI:ddr_pllcfg" 0xFFFFFFFF 112 Tag <0x10000050 0x4> "PRCI:hfpclk_pllcfg" 0xFFFFFFFF 113