1nvic: IRQControllers.NVIC @ sysbus 0xE000E000 2 priorityMask: 0xE0 3 systickFrequency: 61440000 4 IRQ -> cpu@0 5 6cpu: CPU.CortexM @ sysbus 7 cpuType: "cortex-m4f" 8 nvic: nvic 9 10uart: UART.PL011 @ sysbus 0x40010000 11 -> intrCtrl@7 12 13dwt: Miscellaneous.DWT @ sysbus 0xE0001000 14 frequency: 72000000 15 16spt: Timers.EOSS3_SimplePeriodicTimer @ sysbus 0x40005C00 17 18m4mem: Memory.MappedMemory @ { 19 sysbus 0x0; 20 sysbus 0x20000000 //mirror 21 } 22 size: 0x80000 23 24intrCtrl: IRQControllers.EOSS3_IntrCtrl @ { 25 sysbus 0x40004800; 26 sysbus new Bus.BusMultiRegistration { address: 0x40005100; size: 0x8; region: "misc" }; 27 sysbus new Bus.BusMultiRegistration { address: 0x40004C00; size: 0x200; region: "iomux" } 28 } { 29 // we have to use braces to split this very long single line 30 [ 31 SoftwareIrq2, SoftwareIrq1, /* Reserved1, */ FFE0MessageIrq, FabricIrq, GPIOIrq, SRAMIrq, UARTIrq, TimerIrq, 32 WatchdogIrq, WatchdogResetIrq, BusTimeoutIrq, FPUIrq, PacketFIFOIrq, ReservedI2SIrq, ReservedAudioIrq, 33 SPIMasterIrq, ConfigDMAIrq, PMUTimerIrq, ADCIrq, RTCIrq, ResetIrq, FFE0Irq, WatchdogFFEIrq, ApBootIrq, 34 LDO30Irq, LDO50Irq, ReservedSRAMIrq, LPSDIrq, DMicIrq 35 ] 36 -> nvic@[0, 1, 3-29] // 2 is reserved and not named, so we don't connect it at all 37 } 38 39adc: Analog.EOSS3_ADC @ sysbus 0x40005A00 40 41spi: SPI.DesignWare_SPI @ sysbus 0x40007000 42 transmitDepth: 128 43 receiveDepth: 128 44 -> dmaSpi@0 45 46dmaSpi: DMA.EOSS3_SPI_DMA @ sysbus 0x40007400 47 -> intrCtrl@17 48 spi: spi 49 50packetFifo: Miscellaneous.EOSS3_PacketFIFO @ sysbus 0x40002000 51 -> intrCtrl@13 52 53systemDma: DMA.UDMA @ sysbus 0x4000C000 54 numberOfChannels: 16 55 56systemDmaBridge: DMA.EOSS3_SystemDMABridge @ sysbus 0x4000D000 57 systemDma: systemDma 58 59systemDmaSram: Memory.MappedMemory @ sysbus 0x4000F000 60 size: 0x1000 61 62ffe: Miscellaneous.EOSS3_FlexibleFusionEngine @ sysbus 0x4004A000 63 64i2cMaster0: I2C.OpenCoresI2C @ ffe 0 65 66i2cMaster1: I2C.OpenCoresI2C @ ffe 1 67 68voice: Sound.EOSS3_Voice @ sysbus 0x40015000 69 -> nvic@45 70 71powerMgmt: Python.PythonPeripheral @ sysbus 0x40004400 72 size: 0x400 73 initable: true 74 filename: "scripts/pydev/flipflop.py" 75 76sysbus: 77 init: 78 Tag <0x40005400, 0x4000549F> "AnalogIP" 0x0 79 Tag <0x400054A0, 0x400057FF> "AnalogIP (unlocked)" 0x1 80 81 Tag <0x40004400, 0x4000446F> "PowerManagementUnit 1/6" 0x1 82 Tag <0x40004470, 0x4000448F> "PowerManagementUnit 2/6" 0x0 83 Tag <0x40004490, 0x400044AF> "PowerManagementUnit 3/6" 0x1 84 Tag <0x400044B0, 0x400044CF> "PowerManagementUnit 4/6" 0x0 85 Tag <0x400044D0, 0x400044E3> "PowerManagementUnit 5/6" 0x1 86 Tag <0x400044E4, 0x400047FF> "PowerManagementUnit 6/6" 0x2b 87 88 Tag <0x40004000, 0x400043FF> "Clock (CRU)" 0x1 89 90 Tag <0x40000000, 0x400000FF> "M4_Regs" 91 Tag <0x40002000, 0x40003FFF> "Packet FIFO Bank" 92 Tag <0x40004C00, 0x40004FFF> "IO_Mux" 93 Tag <0x40005000, 0x400053FF> "Misc" 94 Tag <0x40005A00, 0x40005BFF> "JTM" 95 Tag <0x40006000, 0x40006FFF> "A1_Regs" 96 Tag <0x40008000, 0x400083FF> "eFuse" 97 Tag <0x4000B000, 0x4000BFFF> "I2S_Slave" 98 Tag <0x4000C000, 0x4000CFFF> "SDMA" 99 Tag <0x4000D000, 0x4000DFFF> "SDMA_Bridge" 100 Tag <0x4000F000, 0x4000FFFF> "SDMA_SRAM" 101 Tag <0x40012000, 0x40012FFF> "WDT" 102 Tag <0x40013000, 0x40013FFF> "Timer" 103 Tag <0x40014000, 0x40014FFF> "CFG_CTL_TOP (PIF Controller)" 104 Tag <0x40018000, 0x40018FFF> "RAMFIFO0" 105 Tag <0x40019000, 0x40019FFF> "RAMFIFO1" 106 Tag <0x4001A000, 0x4001AFFF> "RAMFIFO2" 107 Tag <0x4001B000, 0x4001BFFF> "RAMFIFO3" 108 Tag <0x40020000, 0x4003FFFF> "Fabric" 109 110 Tag <0x40040000, 0x40043FFF> "FFE_DM0" 0x10000 111 112 Tag <0x40044000, 0x40047FFF> "FFE_SM0" 113 Tag <0x40048000, 0x40049FFF> "FFE_SM1" 114 Tag <0x4004A000, 0x4004BFFF> "FFE_ExtRegs" 115 Tag <0x40050000, 0x4007FFFF> "FFE_CM" 116 Tag <0xE0000000, 0xE0000FFF> "M4_ITM" 117 Tag <0xE0002000, 0xE0002FFF> "M4_FBP" 118 Tag <0xE0040000, 0xE0040FFF> "M4_TPIU" 119 Tag <0xE00FF000, 0xE00FFFFF> "M4_DAP" 120