1Renode changelog 2================ 3 4This document describes notable changes to the Renode framework. 5 61.15.3 - 2024.09.17 7------------------- 8 9Added and improved architecture support: 10 11* fixed Arm MPU skipping access checks for MPU regions sharing a page with a background region 12* FPU dirty flag is now set on all FPU load instructions for RISC-V 13* fixed Arm PMSAv8 not checking for domains not being page aligned 14* RISC-V MTVAL register now contains the invalid instruction after illegal instruction exception 15* Arm SRS (Store Return State) instruction now saves onto stack SPSR instead of masked CPSR 16* improved support for x86-64, verified with Zephyr 17* added SMEPMP extension stub for RISC-V 18* added ability to configure usable bits in RISC-V PMPADDR registers 19* fixed runtime configurability of the RISC-V MISA registers 20* fixed RISC-V PMPCFG semantics from WIRI to WARL 21* fixed decoding of C.ADDI4SPN in RISC-V 22* fixed behavior of RORIW, RORI and SLLI.UW RISC-V instructions 23* changed MSTATUS RISC-V CSR to be more responsive to the presence of User and Supervisor modes 24 25Added and improved platform descriptions: 26 27* NXP MR-CANHUBK3 28* NXP S32K388 29* NXP S32K118 30* RI5CY 31* Renesas r7fa8m1a 32* Renesas DA14592 33* STM32H743 34* x86-64 ACRN 35 36Added demos and tests: 37 38* Zephyr running hello_world demo on x86-64 ACRN 39* ZynqMP demo showcasing two way communication between Cortex-A53 running Linux and Cortex-R5 running OpenAMP echo sample 40 41Added features: 42 43* Socket Manager mechanism, organizing socket management in a single entity 44* test real-time timeout handling mechanism in Robot 45* GPIO events support for the External Control API 46* Zephyr Mode support for Arm, Arm-M, SPARC, x86 and Xtensa 47* disassembling support for x86-64 architecture 48* support for bus access widths other than DoubleWord for DPI integration of APB3 49* support for overriding a default implementation of the verilated UART model 50 51Changed: 52 53* improved `renesas-segger-rtt.py` helper 54* Renode logs a warning instead of crashing when HDL co-simulated block reports an error 55* improved `guest cache` tool results readability 56 57Fixed: 58 59* PulseGenerator behavior when `onTicks == offTicks` 60* External Control API GetTime command returning incorrect results 61* SystemC integration crashing when initializing GPIO connections 62* USB Speed value reported in USB/IP device descriptor 63* USB endpoints with the same number but opposite direction not being distinguished 64* a potential crash due to ``OverflowException`` when stopping the emulation 65* checking address range when mapping memory ranges in TranslationCPU 66* configuration descriptor parsing in USBIPServer 67* fatal TCG errors in some cases of invalid RISC-V instructions 68* handling registration of regions not defined by peripherals 69* handling registration of regions with unpaired access method 70* incorrect sequence number in USBIP setup packet reply 71* SD card reset condition 72* starting GDB stub on platforms containing CPUs not supporting GDB 73* infinite loop on debug exception with an interrupt pending 74* simulation elements unpausing after some Monitor commands 75 76Added peripheral models: 77 78* Arm CoreLink Network Interconnect 79* LPC Clock0 80* RenesasDA14 GeneralPurposeRegisters 81* STM32 SDMMC 82* Synopsys SSI 83 84Improvements in peripherals: 85 86* Arm Signals Unit 87* CAES ADC 88* Gaisler FaultTolerantMemoryController 89* LPC USART 90* MiV CoreUART 91* NXP LPUART 92* RenesasDA Watchdog 93* RenesasDA14 ClockGenerationController 94* RISC-V Platform Level Interrupt Controller 95* STM32 DMA 96* ZynqMP IPI 97* ZynqMP Platform Management Unit 98 991.15.2 - 2024.08.18 100------------------- 101 102Added and improved architecture support: 103 104* support for Core-Local Interrupt Controller (CLIC) in RISC-V, enabling several flavors of the (not yet ratified) RISC-V Fast Interrupts specification 105* various improvements to x86 architecture support, including virtual address translation fixes 106* RISC-V custom instructions now have to follow length encoding patterns, as specified in the ISA manual (section 1.2 Instruction Length Encoding) 107* fixed fetching RISC-V instruction with PMP boundary set exactly after the instruction 108* fixed setting MPP after mret on RISC-V platforms without user privilege level 109* fixed RISC-V PMPCFG CSR operations not respecting the ``write any, read legal`` semantics 110* fixed RISC-V fcvt.wu.s, fcvt.lu.s and vmulh.vv instructions implementation 111 112Added and improved platform descriptions: 113 114* NPCX9 platform with improved bootrom implementation 115* Chip revision tags in the Renesas DA14592 platform 116* Fixed MPU regions configuration in Cortex-R8 SMP platform description 117* Nuvoton NPCX9M6F EVB 118* Microchip Mi-V, with correct Privileged Architecture version 119 120Added peripheral models: 121 122* MAX32655 UART 123* NEORV32 Machine System Timer 124* NEORV32 UART 125* KB1200 UART 126* RISC-V Core-Local Interrupt Controller 127* STM32WBA CRC 128* VeeR EL2 RISC-V core with custom CSRs 129 130Added demos and tests: 131 132* HiRTOS sample running on a dual-core Cortex-R52 133* Xen hypervisor running on Cortex-R52 with Zephyr payload 134* remoteproc demo on ZynqMP, with Linux running on Cortex-A loading Zephyr to Cortex-R 135* NPCX9 Zephyr-based tests for GPIO and I2C 136* synthetic tests for RISC-V Core-Local Interrupt Controller 137* RISC-V Core-Local Interrupt Controller tests based on riscv-arch-test 138* Zephyr bluetooth HR demo running on 4 nRF52840 in host / controller split communicating with HCI UART 139* Zephyr running hello_world sample on X86 140* regression test for custom RISC-V instructions not following the length encoding pattern 141 142Added features: 143 144* CPU cache analysis tool using the ExecutionTracer interface 145* initial GPIO support via External Control API 146* Wait For Lines On Uart keyword for Robot Framework for multiline matching 147* ability to specify aliases for names of constructor parameters in REPL, simplifying adaptation to API changes 148* ability to specify implemented privilege levels on RISC-V processors 149* initial SMC handling for ARMv8 CPUs 150* ability to load snapshots (.save files) from CLI 151* mechanism for enabling sysbus transaction translations for unimplemented widths in runtime 152* network based logging backend 153* option to assert match on the next line in UART keywords for Robot Framework 154* remapping exception vector in Arm CPUs having neither VBAR nor VTOR 155* support for declaring clusters of cores in REPL files 156* support for loading gzip compressed emulation snapshots 157* NetMQ and AsyncIO integration 158 159Changed: 160 161* ExecutionTracer logs additional physical address on memory access when MMU translation is involved 162* ExecutionTracer tracks values written to/read from memory if TrackMemoryAccesses parameter is used 163* added the ability to override build properties 164* added the ability to track memory accesses when address translation is active 165* External Control client \`run_for\` example can now progress time multiple times without reconnecting 166* machine by default disallows spawning a GdbServer with CPUs belonging to different architectures. 167* made user-configured $CC the default value for Compiler and LinkerPath and $AR for ArPath 168* paths encapsulated in quotes can handle names with whitespaces 169* paths in Monitor can be encapsulated in quotes in more contexts 170* improved precision of timer reconfiguration 171* translation library will attempt to expand its code buffer when running out of space 172* improved flexibility of parameter passing to registration points in REPL, as used by GIC 173* improved flexibility of the logLevel command 174* improved Renode pausing responsiveness when using TAP interface on Linux 175* improved performance of External Control API renode_run_for function 176* simplified per-core registration API in REPL files 177* renamed \`\`PrivilegeArchitecture\`\` to \`\`PrivilegedArchitecture\`\` on RISC-V 178* unified STM32 CRC peripherals so they use a single class configured with the STM32Series enum 179* co-simulated peripherals protocol on writes directed to system bus 180* MacOS now uses \`\`mono\`\` instead of \`\`mono64\`\` as a runner, which is equivalent since Mono 5.2 181* time updates are now deferred when possible to improve performance 182* virtual time precision is now 1 nanosecond instead of 1 microsecond 183* limited unnecessary invalidations of memory for multicore platforms 184* CPU-specific peripheral registrations have now higher priority than the global ones 185* undefined AArch64 ID registers are now treated as RAZ 186 187Fixed: 188 189* initialization of VFP registers for Armv8 CPUs 190* support for building tlibs with clang 191* interruption of instructions block on precise pause 192* accessing RISC-V counter CSRs for lower privilege levels for privileged specification 1.10 and newer 193* Time Framework errors when handling halted CPUs 194* running renode and renode-test commands via symlinks 195* serialization of ARMv8-A CPUs 196* serialization of some complex classes 197* listing of registration points for peripherals registered at both cpu and sysbus 198* handling of watchpoints set at addresses above the 32-bit range 199* crashes when using both aliased attribute name and normal name at the same time 200* possible hang when disabling logging of peripheral accesses 201* handling of exclusive store/load instructions for ARMv7-R CPUs 202* handling of interrupting execution in GDB on multicore platforms in all-stop mode 203* allocating huge amount of memory for translation cache on CPU deserialization 204* invalid undefined instruction faults for Armv8 CPUs 205* GDB getting confused when receiving Ctrl-C on multicore platforms 206* LSM303 peripheral test 207* CS7034 \"specified version string does not conform to recommended format\" warning appearing when building 208* Vegaboard-RI5CY demo failing to boot 209* exception thrown on an empty message in log when failing a Robot test 210* linking and imports in the External Control library 211* nonstandard configuration byte when disabling Telnet line mode 212* printing skipped test status 213* version information not appearing correctly after running \`renode --help\` 214 215Improvements in peripherals: 216 217* Ambiq Apollo4 System Timer 218* Arm Generic Interrupt Controller 219* ARM Generic Timer 220* Arm Performance Monitoring Unit 221* Arm Snoop Control Unit 222* Arm CPUs 223* Arm Signal Unit 224* Gaisler APB UART 225* K6xF Multipurpose Clock Generator 226* KB1200 UART 227* LPC USART 228* Macronix MX25R 229* MAX32650 WDT 230* Mi-V Core Timer 231* MPFS SD controller 232* NEORV32 UART 233* NPCX MDMA 234* NPCX ITIM, including both 32 and 64-bit flavors of the peripheral 235* NPCX TWD 236* NPCX SMBus 237* NPCX UART 238* nRF52840 CLOCK 239* NVIC 240* Renesas RA6M5 SCI 241* RCAR UART 242* SAMD20 UART 243* SD card 244* STM32 UART 245* STM32 LTDC 246* STM32 CRC 247* STM32 Timer 248* STM32F4 Flash with added mass erase and sector erase commands 249* STM32L0 RCC model with added support for Low-power timer (LPTIM) reset 250* STM32WBA GPDMA 251* SynopsysDWCEthernetQualityOfService incorrectly resetting transmit/receive buffer position when suspending its DMA engine 252* VirtIO 253* Zynq7000 System Level Control Registers 254 2551.15.1 - 2024.06.14 256------------------- 257 258Added and improved architecture support: 259 260* improved support for SMP processing in Armv8 and Armv7 261* configuration signals for Arm cores 262* LOB extension (without tp variants) for Armv7 263* VSTRW instruction support from Armv8.1-M MVE 264* support for additional Arm CP14 and CP15 registers 265* Armv8 LDM (user) instruction will update registers predictably even when executing in System Mode, instead of being UNPREDICTABLE according to Arm documentation 266* basic support for Cortex-A5 CPU type 267* DCIMALL instruction for Aarch32 CPUs 268* IMP_CDBGDCI instruction for Cortex-R52 CPUs 269 270Added and improved platform descriptions: 271 272* timer interrupts configuration for STM32F4-based platforms 273* improvements to networking configuration for StarFive JH7100 274* improvements to Renesas R7FA2E1A9, R7FA2L1A, R7FA4M1A, R7FA6M5B, R7FA8M1A SoC 275* improvements to UT32M0R500 SoC 276* platform with example sensor connections for CK-RA6M5 277* multicore Cortex-R52 platform 278* multicore Cortex-A53 with GICv3 in SMP configuration 279* improvements to the Cortex-R52 platform 280* GIC architecture version selection for many Arm platforms 281* added Arm signal unit support for Cortex-R8 and multicore Cortex-R8 platforms 282* merged Zynq Ultrascale+ into a single platform with both Cortex-A and Cortex-R CPUs 283* updated peripherals registration for STM32F0, STM32F4, STM32F746, STM32G0, STM32H743, STM32L071, STM32L151, STM32L552, STM32WBA52 SoCs 284 285* Renesas CK-RA6M5 board 286* Beagle-V Fire, with Microchip's PolarFire SoC 287 288Added peripheral models: 289 290* Gaisler ADC 291* NPCX GPIO 292* NPCX SMBus 293* NXP OS Timer 294* Renesas DA SPI 295* Renesas RA IIC 296* Renesas DA14 GeneralRegisters 297* Renesas DA14 XTAL32MRegisters 298* S32K3XX EMAC 299* S32K3XX FlexCAN 300* S32K3XX FlexIO with SENT and UART endpoints 301* S32K3XX GMAC 302* S32K3XX Low Power IIC 303* STM32H7 Crypto Accelerator 304* STM32H7 QuadSPI 305* STM32WBA GP DMA 306* UT32 CAN 307* VirtIO Filesystem device 308* ZynqMP Inter Processor Interrupt controller 309* ZynqMP Platform Management Unit 310* ZMOD4410 and ZMOD4510 air quality sensors 311* AK09916 and AK09918 3-axis electronic compass sensors 312* generic configurable Pulse Generator block 313 314Added demos and tests: 315 316* I2C echo test for Renesas DA14592 317* addtional unit tests for CRCEngine 318* I2C mode tests for Renesas RA8M1 SCI 319* BeagleV-StarLight ethernet tests 320* serialization tests for Armv8-A and Armv8-R cores 321* Cortex-R8 Zephyr tests 322* configuration signals tests for Cortex-R8 323* NXP S32K388 Low Power SPI test 324* HiRTOS samples (including multicore) on Cortex-R52 325* Renesas RA6M5 platform tests including SCI SPI, ICM20948, HS3001, IIC 326* EXT2 filesystem Zephyr tests based on SiFive FU740 327* STM32H7 Nucleo test for CRYPTO and SPI 328* tests for GDB accessing peripheral space 329* regression tests for ARMv8 Security State and Exception Level after core initialization 330* VirtIO Filesystem directory sharing test 331* Zephyr SMP test for Cortex-R52 332* aws_cc test for the Renesas CK-RA6M5 board 333* machine log level test 334* range locking tests in sysbus.robot 335 336Added features: 337 338* mechanism for integrating Renode with SystemC simulations 339* VirtIO-based directory sharing with host OS 340* new GIC redistributor regions registration methods for multi-core platforms 341* CAN analyzer support in Wireshark integration 342* CPU-specific function names lookup support 343* ability to clear CPU-specific or global function names lookups 344* SENT protocol support 345* LIN protocol support 346* IADC interface for generic ADC control 347* support for specifying additional offset to function names addresses in lookups 348* locking sysbus accesses to specified ranges 349* easier access to externals in Python scripts via externals variable 350* external control API with C client library 351* integration with dts2repl tool 352* virtual CAN host integration via SocketCAN bridge 353* ability to control log level of the whole machine with the logLevel command 354* ability to specify Privileged Architecture Version 1.12 on RISC-V processors 355* optional CPU context in locking sysbus accesses to peripherals 356 357Fixed: 358 359* Migrant not keeping track of all child-parent connections in the Reflection mode 360* Arm PMSAv8 configuration using stale values in some circumstances 361* Armv7 CP15 registers - ADFSR, AIFSR, non-MP BP*, DC* and IC* registers 362* Armv7 and older memory barrier instructions and CP15 registers (DMB, DSB and DWB) 363* read accesses to write-only Aarch32 coprocessor registers 364* Armv7/Armv8 MPIDR register 365* breakpoints serialization and deserialization 366* calculation of target EL and interrupt masking for Armv8 Aarch32 367* crashes in certian register configurations for Armv8 Aarch32 368* FIQs being disabled with no way of enabling them for GICv3 and onwards 369* NA4 range end address calculation in RISC-V PMP 370* effective PMP configuration calculation in RISC-V when mstatus.MPRV is set 371* RISC-V vector load and store segment instructions 372* crashes when a breakpoint and a watchpoint trigger at the same instruction 373* RISC-V PMP NAPOT grain check implementation 374* TranslationCPU's CyclesPerInstruction changes during runtime not being automatically applied to ArmPerformanceMonitoringUnit's cycle counters 375* unmapping of memory segments 376* unregistering peripherals 377* valid Ethernet frames sometimes getting rejected due to CRC mismatch 378* virtual time advancing too far when pausing the emulation 379* CCSIDR for L1 data cache in Arm Cortex-R8 380* CCSIDR for L2 cache in Arm Cortex-R5/R8 381* renode-test --include behavior for NUnit test suites 382* atomic instructions handling when running multithreaded program on a single CPU machine 383* automatic 64-bit access translations on system bus 384* crashes on Cortex-M construction if NVIC is already attached to a different core 385* exclusive load/store instructions on Armv8 386* failures in monitor-tests.Should Pause Renode under certain conditions 387* invalid Asciinema generation if the UART output contains a backslash character 388* logging value written on an unhandled tag write 389* names of Arm TCM registers 390* pausing on SemihostingUart events in Xtensa CPUs 391* reporting thread ID as decimal number in GDB's query command - cpuId restricted to 32 392* selecting PMP access mode for RISC-V cores 393* serialization for Armv8-A and Armv8-R cores 394* suppressed SP and PC initialization on halted Cortex-M cores 395* cache selection in Armv7 and older CPUs, now verified with CLIDR when reading CCSIDR 396* precise pausing causing parts of the instruction to be executed twice 397* ARM MPU ignoring memory restriction check to the page that was previously accessed even if region/subregion permissions don't match 398* Armv8-R AArch32 executing in Secure State instead on Non-Secure 399* Armv8-R changing Security State, while it should never do so 400* Armv8 cores not propagating their Exception Level and Security State outside tlib correctly after creation 401* DMAEngine memory transactions with when not incrementing source or destination addresses 402* RISC-V BEXT instruction handling 403* RISC-V xRET instructions not changing status bits correctly 404* SocketServerProvider not closing correctly without any connected clients 405* detection of test failures which should be retried when renode-test's --retry option is used 406* handling peripheral accesses when debugging with GDB 407* initialization of PC and SP on leaving reset on Cortex-M 408* printing of possible values for invalid Enum arguments in Monitor commands 409* heterogeneous platforms handling in GDB 410* single step execution mode in Xtensa cores 411* variable expansion in Monitor 412 413 414Changed: 415 416* Terminal Tester delayed typing now relies on virtual time 417* removed AdvancedLoggerViewer plugin 418* improved TAP networking performance on Linux 419* reduced overhead of calling tlib exports 420* TranslationCPU's CyclesPerInstruction now accepts non-integer values 421* CPU Step call now automatically starts the emulation 422* upgraded Robot Framework to 6.1, to work with Python 3.12 423* renamed the ID property of Arm cores to ModelID 424* improved Arm core performance 425* improved logging performance if lower log levels are not enabled 426* added host memory barrier generation to TCG 427* actions delayed with machine.ScheduleAction can now execute as soon as the end of the current instructions block (it used to be quantum) 428* CPU's SingleStepBlocking and SingleStepNonBlocking ExecutionModes were replaced by SingleStep and emulation.SingleStepBlocking was added 429* blockOnStep was removed from StartGdbServer 430* single-step-based tests were refactored due to automatic start on Step and ExecutionMode changes 431 432Improvements in peripherals: 433 434* Andes AndeStarV5Extension.cs - Added Configuration and Crash Debug CSRs 435* Arm Generic Interrupt Controller, with changes to v1, v2 and v3 versions, focused on improving multicore support for both Armv7 and Armv8 platforms 436* Gaisler APBUART 437* Gaisler GPTimer 438* Gaisler Ethernet 439* Gaisler MIC 440* Kinetis LPUART 441* NPCX FIU 442* NPCX Flash 443* NXP LPSPI 444* Renesas RA8M1 SCI 445* Renesas DA I2C 446* Renesas DA Watchdog 447* Renesas DA14 DMA 448* Renesas RA6M5 SCI 449* Renesas DA DMABase 450* S32K3XX LowPowerInterIntegratedCircuit 451* SDCard 452* STM32 PWR 453* STM32F4 CRC 454* STM32H7 RCC 455* Synopsys DWCEthernetQualityOfService 456* Synopsys EthernetMAC 457* VirtIOBlockDevice, now based on VirtIO MMIO version v1.2 458* Xilinx IPI mailbox 459* BME280 sensor 460* ICM20948 sensor 461* SHT45 sensor 462 463 4641.15.0 - 2024.03.18 465------------------- 466 467Added architecture support: 468 469* initial support for ARMv7-R and Cortex-R8, verified with ThreadX and Zephyr 470* initial support for Cortex-A55 471* initial support for Cortex-M23 and Cortex-M85 472* support for RISC-V Bit Manipulation extensions - Zba, Zbb, Zbc and Zbs 473* support for RISC-V Half-precision Floating Point (Zfh) extension, including vector operations 474* support for RISC-V Andes AndeStar V5 ISA extension 475 476Added and improved platform descriptions: 477 478* generic Cortex-R8 platform 479* Renesas EK-RA2E1 board with R7FA2E1A9 SoC 480* Arduino Uno R4 Minima platform with Renesas F7FA4M1A SoC 481* Renesas CK-RA6M5 board with R7FA6M5B SoC, with initial radio support 482* Renesas EK-RA8M1 board with R7FA8M1A SoC 483* Renesas R7FA2L1A SoC 484* Renesas DA14592 SoC 485* Renesas RZ/T2M-RSK board with RZ/T2M SoC 486* Gaisler GR712RC SoC with UART, timer, GPIO, FTMC and Ethernet 487* Gaisler GR716 SoC with UART, timer and GPIO 488* Gaisler UT32M0R500 SoC with UART, timer and GPIO 489* NXP S32K388 with UART, timers, watchdog, SIUL2, SPI, Mode entry module and others 490* NXP LPC2294 SoC with UART, CAN, timer and interrupts support 491* Xilinx Zynq UltraScale+ MPSoC platform support with single core Cortex-A53, UART, GPIO and I2C 492* singlecore Cortex-R5 part of Zynq UltraScale+ MPSoC platform with UART, TTC, Ethernet and GPIO 493* Nuvoton NPCX9 platform support with UART, various timers, SPI, flash and other peripherals 494* ST Nucleo H753ZI with STM32H753 SoC with a range of ST peripherals 495* updates to Armv8-A platforms 496* updates to Ambiq Apollo4 497* updates to Xilinx Zynq 7000 498* various updates in STM32 platform files 499 500Added peripheral models: 501 502* ABRTCMC, I2C-based RTC 503* Altera JTAG UART 504* Ambiq Apollo4 Watchdog 505* Arm Global Timer 506* Arm Private Timer 507* Arm SP804 Timer 508* ArmSnoopControlUnit 509* BCM2711 AUX UART 510* BME280 sensor 511* Betrusted EC I2C 512* Betrusted SoC I2C 513* Bosch M_CAN 514* CAN to UART converter 515* Cadence Watchdog Timer 516* Gaisler APBUART 517* Gaisler GPIO 518* GigaDevice GD32 UART 519* HS3001 sensor 520* ICM20948 sensor 521* ICP10101 sensor 522* Infineon SCB UART 523* LINFlexD UART 524* MB85RC1MT Ferroelectric Random Access Memory 525* MXIC MX66UM1G45G flash 526* NPCX FIU 527* NPCX Flash 528* NPCX HFCG 529* NPCX ITIM32 530* NPCX LFCG 531* NPCX MDMA 532* NPCX Monotonic Counter 533* NPCX SPIP 534* NPCX Timer and Watchdog 535* NPCX UART 536* NXP LPC CAN 537* NXP LPC CTimer 538* NXP LPC USART 539* OB1203A sensor 540* PL190 vectored interrupt controller 541* PL330_DMA (CoreLink DMA-330) Controller 542* Renesas DA14 DMA peripheral 543* Renesas DA14 GPIO 544* Renesas DA14 General Purpose Timer 545* Renesas DA14 UART 546* Renesas DA14 I2C 547* Renesas DA16200 Wi-Fi module 548* Renesas RA series AGT 549* Renesas RA series GPIO 550* Renesas RA series GPT 551* Renesas RA series ICU 552* Renesas RA series SCI 553* Renesas RZ/T2M GPIO 554* Renesas RZ/T2M SCI 555* S32K3XX Miscellaneous System Control Module 556* S32K3XX Periodic Interrupt Timer 557* S32K3XX Real Time Clock 558* S32K3XX Software Watchdog Timer 559* S32K3XX System Integration Unit Lite 2 560* S32K3XX System Timer Module 561* S32K3XX FlexIO stub 562* S32K3XX Mode Entry Module 563* SHT45 temperature/humidity sensor 564* SPI NAND flash 565* STM32WBA PWR 566* Samsung K9 NAND Flash 567* Smartbond UART 568* Universal Flash Storage (JESD220F) 569* Universal Flash Storage Host Controller (JESD223E) 570* XMC4XXX UART 571* ZMOD4xxx sensor 572* Zynq 7000 System Level Control Registers 573 574 5751.14.0 - 2023.08.08 576------------------- 577 578Added architecture support: 579 580* initial support for ARMv8-A, verified with a range of software, from Coreboot and U-Boot to Linux 581* initial support for ARMv8-R, verified with U-Boot and Zephyr 582 583Added and improved platform descriptions: 584 585* generic Cortex-A53 platform, in flavors with GICv3 and GICv2 586* generic Cortex-A78 platform 587* generic Cortex-R52 platform 588* HiFive Unmatched platform support, with UART, PWM, I2C, GPIO, Ethernet, QSPI and other peripherals 589* Nucleo WBA52CG with STM32WBA52 590* updated OpenTitan and EarlGrey platform to a newer version 591* various updates in STM32 platform files 592* translation support for Espressif ESP32 chips 593 594Added peripheral models: 595 596* ARM GIC, compatible with various specification versions 597* ARM generic timer 598* CMSDK APB UART 599* Cypress S25H Flash 600* EFR32xG2 I2C 601* EFR32xG2 RTCC 602* EFR32xG2 UART 603* Marvell Armada Timer 604* MXC UART 605* OMAP Timer 606* OpenTitan Entropy Distribution Network 607* Quectel BC66 608* Quectel BG96 609* SI7210 Temperature sensor 610* SPI multiplexer 611* STM32F4 CRC 612* STM32F4 Flash 613* STM32H7 Flash 614* STM32WBA Flash 615* STM32H7 Hardware Semaphore 616* STM32H7 SPI 617* STM32WBA SPI 618* STM32WBA ADC 619* Synopsys DWC Ethernet QoS model, along with Linux-based tests 620* TMP108 Temperature sensor 621 622Added demos and tests: 623 624* Cortex-A53 and Cortex-A78 running Coreboot, ATF and Linux 625* Zephyr running echo_client demo on STM32F7-disco with Quectel BG96 626* basic Cortex-A53 Zephyr ``hello-world`` test and sample 627* additional Zephyr tests for Cortex-A53: ``synchronization``, ``philosophers``, kernel FPU sharing 628* seL4 Adder Sample test for Cortex-A53 629* range of Zephyr tests for Cortex-R52, along with custom-made, synthetic tests 630* precise pausing tests for LED and terminal tester 631 632Added features: 633 634* renode-test allows to run tests with a specified tag via the ``--include`` switch 635* DPI interface for external HDL simulators, supporting AXI4 interface 636* portable package creation on dotnet 637* option to have Robot test pause execution deterministically after a match in various testers: UART, LED, log 638* duty cycle detection in LED tester 639* option to load files (e.g. raw binaries, hex files) to different localizations, like memories 640* support for relative paths in REPL file ``using`` directive 641* MPU support for Cortex-M 642* ``FAULTMASK`` register in Cortex-M 643* support for Trace Based Model performance simulator by Google 644* read and write hooks for peripherals 645* DPI interface support for co-simulating with RTL, with initial support for AXI4 bus 646* build.sh ``--profile-build`` switch to enable easier profiling of translation libraries 647* mechanism for progressing virtual time without executing instructions 648* support for subregions in Cortex-M MPU 649* support for FPU exceptions for Cortex-M 650* quad word (64-bit) peripherals API 651* ``CSV2RESD`` tool, for easy generation of RESD files 652* automatic selection of port used to communicate between Renode and Robot 653* option to pause emulation of Robot keywords 654* support for NMI interrupts in RISC-V 655* option to save Renode logs for all tests 656* ``Execute Python`` keyword in Robot tests 657 658Changed: 659 660* GDB interacts with Renode much faster 661* Renode now uses Robot Framework 6.0.2 for testing (with an option to use other versions at your own risk) 662* RESD format now accepts negative ``sampleOffsetTime`` 663* HEX files loader now supports extended segment address and start segment address sections 664* GDB ``autostart`` parameter now starts the simulation as soon as the debugger is connected 665* VerilatorIntegrationLibrary is now part of Renode packages 666* improved performance of the virtual time handling loop 667* improved parsing of RESD files 668* improved memory allocation mechanism to allocate memory regions larger than 2GiB 669* support for mapping memories on very high offsets 670* improved GDB connection robustness 671* exposed Monitor as a variable in Python hooks 672* improved the GDB compare helper script 673* improved handling of input files in TFTP server module 674 675Fixed: 676 677* cursor blinking in terminal on Windows 678* crash when NetworkServer tried to log an invalid packet 679* race condition when trying to pause during the machine startup 680* platform serialization when CPU profiler is enabled 681* limit buffer behavior in verilated peripherals when they are reset 682* registration is no longer taken into account when looking for dependency cycles in REPL files 683* exception when issuing a DMA transaction during register access 684* reported PC on exception when executing vector instructions in RISC-V 685* several RISC-V vector instructions handling, e.g. ``vfredosum``, ``vsetivli`` and ``vector_fpu`` 686* invalid instruction block exiting on RISC-V 687* handling of ``c.ebreak`` instruction in RISC-V, allowing for software breakpoints 688* building fixes on dotnet 689* removing of IO access flag from memory pages 690* invalidation of dirty translation blocks 691* handling of MMU faults on address translations 692* serialization of RESD files 693* automatic creation of TAP interface on Linux 694* ARM LDA/STL instructions decoding 695* handling of platforms containing both 32- and 64-bit CPUs 696* file permissions in .NET portable packages 697* handling of non-resettable register fields 698* several RISC-V vector instructions 699* handling of the context menu in the Monitor window 700* support for Cortex-M4F in LLVMDisassembler 701* packets matching method in NetworkInterfaceTester 702* address calculations in DMA engine 703* custom build properties handling in Renode build script 704* handling of time reporting and empty test cases in renode-test 705 706Improvements in peripherals: 707 708* AmbiqApollo4 Timer 709* ArrayMemory 710* AS6221 Temperature sensor 711* AT Command Modem 712* AT91 Timer 713* Cadence UART 714* Cortex-M Systick 715* EF32MG12 LDMA 716* Ibex 717* LIS2DW12 Accelerometer 718* LiteX I2C 719* LSM6DSO 720* MAX30208 Temperature sensor 721* MAX32650 GPIO 722* MAX32650 I2C 723* MAX32650 RTC 724* MAX32650 SPI 725* MAX32650 Timer 726* MAX32650 TPU 727* MAX32650 WDT 728* MAX86171 AFE 729* nRF52840 SPI 730* nRF52840 I2C 731* nRF52840 GPIO 732* OpenTitan HMAC 733* OpenTitan PLIC 734* OpenTitan ROM 735* OpenTitan OTP 736* OpenTitan Key Manager 737* OpenTitan Flash 738* OpenTitan Reset Manager 739* OpenTitan KMAC 740* OpenTitan CSRNG 741* OpenTitan Alert Handler 742* OpenTitan Timer 743* OpenTitan OTBN 744* PL011 UART 745* Quectel BC660K 746* SAMD5 UART 747* SiFive GPIO 748* Silencer 749* STM32 DMA 750* STM32G0 DMA 751* STM32 EXTI, with specific implementations for STM32F4, STM32H7 and STM32WBA 752* STM32 GPIO 753* STM32F7 I2C 754* STM32L0 LPTimer 755* STM32L0 RCC 756* STM32H7 RCC 757* STM32F4 RTC 758* STM32 SPI 759* STM32 Timer 760* STM32F7 USART 761 7621.13.3 - 2023.02.22 763------------------- 764 765Added and improved platform descriptions: 766 767* basic Adafruit ItsyBitsy M4 Express platform with UART and memories 768* various STM32 platforms with improved EXTI connections, IWDG configuration, and new CRC, Flash, PWR, RCC, and LPTimer models added to selected platforms 769* MAX32650 with a new I2C model 770* Zynq 7000 with new I2C, SPI, UART and TTC models 771* Apollo 4 with a new Timer model and a ``program_main2`` bootrom function mock 772* OpenTitan Earlgrey with new OTBN accelerator, AON Timer, System Reset controller, Entropy source, and SRAM controller models 773* nRF52840 with a new EGU model 774* EFR32MG1x with a new LDMA model and improved USART interrupt connections 775 776Added peripheral models: 777 778* Apollo4 IOMaster I2C mode 779* Apollo4 Timer 780* AS6221 skin temperature sensor 781* Cadence I2C controller 782* Cadence SPI controller 783* Cadence TTC 784* Cadence UART 785* Cadence xSPI controller 786* EFR32MG12 LDMA controller 787* LIS2DW12 accelerometer sensor 788* LC709205F Fuel Gauge 789* Macronix MX25R flash 790* MAX30208 temperature sensor 791* MAX32650 I2C controller 792* MAX77818 Fuel Gauge 793* MAX86171 Optical AFE 794* NRF52840 EGU 795* OpenTitan AON Timer 796* OpenTitan Big Number Accelerator (OTBN) full model 797* OpenTitan ClockManager stub 798* OpenTitan Entropy Source controller 799* OpenTitan SRAM controller 800* OpenTitan SystemReset controller 801* Quectel BC660K radio 802* RV8803 RTC 803* STM32F0 CRC 804* STM32H7 RCC 805* STM32L0 Flash controller 806* STM32L0 Low Power Timer 807* STM32L0 PWR 808* TMP103 temperature sensor 809 810Added demos and tests: 811 812* RTC mode unit test 813* Adafruit ItsyBitsy M4 Express Zephyr shell_module test 814* STM32L072 tests for: DMA, PVD interrupt, SPI flash, IWDG, LPUART, EEPROM, and CRC 815* STM32F4 tests for RTC and running an STM32CubeMX app 816* Zynq tests for I2C, TTC, SPI flash, xSPI, and UART based on Linux 817 818Added features: 819 820* support for RESD - Renode Sensor Data format, allowing users to provide multiple sensors with time-coordinated data specific for a given sensor; currently supported in MAX86171, MAX30208, AS6221, and LSM6DSO 821* reorganized CPU classes and interfaces, allowing for easier integration of external CPU simulators 822* IOMMU, with example usage in WindowIOMMU, WindowMMUBusController, and SimpleDMA 823* new key bindings in the Monitor: Ctrl+D for closing the window and Ctrl+U for clearing the current input 824* new key bindings in all terminal windows: Shift+Up/Down arrow for line scrolling and Shift+Home/End for jumping to the beginning and the end of the buffer 825* option to configure UART window location offsets via the config file 826* support for 64-bit bus accesses and 64-bit peripherals 827* support non-resettable peripheral registers and register fields 828* option to register hooks to be called whenever a RISC-V register is accessed - this can be used to emulate non-standard implementation of these registers 829* option to set CPU exceptions from the outside of the CPU 830* Robot keyword to verify that GPIO has a specified state for a given period of time 831* verbose mode in Robot tests 832 833Changed: 834 835* Robot tests do not need a header with settings and keywords anymore 836* changed the conditional syntax in Robot tests to use IF/ELSE for compatibility with newer Robot Framework versions 837* cleaned up tests-related file organization in the repository 838* simplified flags for renode-test under dotnet 839* added skip_mono and skip_dotnet tags to Robot tests 840* removed internal signal mappings from STM32 EXTI, making the interrupt routing more explicit in REPL files 841* console mode will be started instead of telnet when the UI fails to start 842* reset can now be executed on a not started machine 843* expanded the Execution Tracer with ``TrackMemoryAccesses`` and ``TrackVectorConfiguration`` options, along with disassembler-generated info 844* OnMemoryAccess hooks now receive the current PC as a parameter 845* changed the CRCEngine API and improved implementation 846* ELF symbol lookup will now skip several types of unimportant symbols 847* tags can now have zero width to ease the creation of variable width registers 848* added option to invert reset logic in AXI4Lite 849* added handling of the ``WSTRB`` signal in AXI4Lite 850* added support for various address lines connections in Wishbone 851* added various access lengths support for verilated peripherals 852* timeout value for Verilator connections can now be defined in compile time 853* all architectures now sync their PC on memory accesses 854* UARTBase is now a container for IUART devices 855* added option to clear all event subscribers in LimitTimer 856* added ITimer interface for handling basic timer properties 857* extended the excluded assembly list in TypeManager to speed up startup on dotnet 858 859Fixed: 860 861* flushing of the log when using the ``lastLog`` command 862* deadlock when using the ``--console`` mode on dotnet with collapsed log entries enabled 863* Wireshark handling on macOS 864* TAP support on macOS 865* Asciinema usage in multi-machine setups 866* closing of Renode in several problematic scenarios 867* handling of end of file detection in HEX parsing 868* robustness of BLESniffer 869* timestamps discrepancies in file logs and console logs 870* compilation under Visual Studio on Windows 871* compilation on Windows when the PLATFORM environment variable is set 872* graph titles for metrics visualizer 873* handling of peripheral regions in Profiles 874* file sharing and access type settings for open files 875* floating point registers access on RV32 876* several RISC-V Vector instructions 877* crash when the CPU is created with an invalid type 878* RISC-V PMP config reading and writing and NAPOT decoding 879* translation cache invalidation in multicore RISC-V scenarios 880* SEV generation on Cortex-M 881* handling of multi-instructions blocks in Xtensa 882* execution of too many instructions in a single block 883* button sample tests for STM32F072q 884* fastvdma co-simulation test 885* qCRC packet handling in GDB 886* decoding of GDB packets, selecting the command handler based on the longest match for a packet 887* address translation in GDB 888* UARTToSpiConverter logic and user experience 889* handling of Step parameter in ClockEntry 890* changing of frequency for divider calculation in ComparingTimer 891* cleanup of old clock entries 892 893Improvements in peripherals: 894 895* AmbiqApollo4 IOMaster 896* AmbiqApollo4 RTC 897* AthenaX5200 898* Cadence TTC 899* Dummy I2C Slave 900* EFR32 CMU 901* EFR32 USART 902* EFR32 RTCC 903* Generic SPI Flash 904* HiMax HM01B0 905* I2C dummy device 906* LSM6DSO IMU 907* Mapped Memory 908* Micron MT25Q 909* MPFS PDMA 910* NRF52840 SPI 911* NRF52840 I2C 912* NRF52840 RTC 913* NVIC interrupt controller 914* OpenCores I2C 915* OpenTitan I2C 916* OpenTitan Flash controller 917* OpenTitan LifeCycle controller 918* OpenTitan ROM controller 919* SAMD5 UART 920* SI70xx temperature sensor 921* SiFive GPIO 922* STM32 GPIO 923* STM32 SPI 924* STM32 Timer 925* STM32F4 IndependentWatchdog 926* STM32F4 RTC 927* STM32F7 I2C 928* STM32F7 USART 929* STM32L0 RCC 930* STM32G0 DMA 931 9321.13.2 - 2022.10.03 933------------------- 934 935Added platforms: 936 937* Ambiq Apollo4 with ADC, GPIO, IO Master, System Timer, RTC, UART and other peripherals 938* STM32L07x with ADC, GPIO, I2C ,RTC, SPI, Timer, USART, IWDG, DMA and other peripherals (RCC) 939* verilated Ibex core with the rest of the platform natively in Renode 940 941Added models: 942 943* MAX32650 TPU with CRC32 support 944* basic support for MAX32650 ADC 945* MAX32650 SPI 946* MAX32650 Watchdog 947* LSM6DSO IMU 948* EFR32xG12DeviceInformation 949* External CPU stub as a base for integration of other CPU simulators 950* OpenTitan SPI host 951* OpenTitan I2C host 952* OpenTitan Alert Handler, along with updates to other OpenTitan peripherals with alert functionality 953* new algorithms and cores in AthenaX5200 954* EFR32MG1 BitAccess 955* i.MX RT GPTimer 956 957Added demos and tests: 958 959* STM32L072 Zephyr shell_module demo and test 960* Ambiq Apollo4 Hello World example from Ambiq Suite and various peripheral tests 961* MAX32652 EVKIT Hello World example from MAX32652 SDK 962* FPGA ISP co-simulation demo and test 963 964Added features: 965 966* experimental support for .NET 6 framework 967* guest-application profiling for ARM 968* Interrupt hooks for ARM 969* BLE sniffer support for Wireshark 970* Perfetto profiler format support in guest-application profiling, along with process detection on RISC-V 971* binary output format of execution tracer, along with a Python helper script to decode data 972* new Run Until Breakpoint keyword for Robot tests 973* verbose mode in Robot tester 974* region of interest support in FrameBufferTester 975* framework for providing timestamped sensor data 976* WishboneInitiator bus in Verilator support 977* nightly “sources” package with the whole content required for building Renode offline 978 979Organizational improvements: 980 981* added GitHub issue and PR templates, along with an `issue reproduction repository <https://github.com/renode/renode-issue-reproduction-template>`_ 982updated contributing instructions 983 984Changed: 985 986* added mapping for l2ZeroDevice in PolarFire SoC 987* added caching of canvas bounds in TermSharp for improved performance 988* restructured height map storage in TermSharp 989* updated descriptions of SLTB004A and EFR32MG12 targets 990* restructured CPU-related class hierarchy 991* disabled TCG optimizations and liveness analysis for improved performance 992* updated OpenTitan supported version, changing a range of OpenTitan peripherals 993* major refactor of VerilatorIntegrationLibrary, with new interfaces and code restructuration 994* updated symbol exclusion rules not to include $x symbol names in SymbolLookup 995* disabled TLB flushing in RISC-V on mode change for improved performance 996* allowed more than one page permission at a time in RISC-V, reducing the number of address translations 997* improved output of Robot tests with timestamps and explicit test results after each suite 998* SD card controller now supports more card types 999 1000Fixed: 1001 1002* PMP implementation for RISC-V 1003* several RISC-V vector instructions including floating-point vector instructions 1004* 'Take Screenshot' button in VideoAnalyzer 1005* non-blocking CPU stepping 1006* crash when loading file without sufficient permissions 1007* external MMU not respecting the `no_page_fault` flag 1008* issues with concurrent creation of config file 1009* indeterminism of sel4_extensions test 1010* GDB Stub not issuing an error when trying to add zero-sized watchpoint 1011* handling of watchpoints on big-endian platforms 1012* portability of MSBuild calls across different host systems 1013* PolarFire SoC Watchdog test 1014* serialization of FrameBufferTester 1015* translation cache flushing after reset 1016 1017Improvements in peripherals: 1018 1019* Cortex-M NVIC 1020* HPSHostController 1021* NRF52840 Watchdog 1022* BMC050 accelerometer 1023* MAX32650 RTC 1024* MAX32650 GCR 1025* STM32F7 I2C 1026* STM32G0 DMA 1027* Micron MT25Q 1028* i.MX RT GPIO 1029 1030 10311.13.1 - 2022.07.23 1032------------------- 1033 1034Added platforms: 1035 1036* MAX32652 with UART, GPIO, Timer, PWRSEQ, GCR and RTC 1037* Thunderboard Sense 2 (SLTB004A) based on EFR32MG12 1038 1039Added models: 1040 1041* STM32G0 DMA controller 1042* OpenTitan CSRNG 1043* OpenTitan OTP controller 1044* OpenTitan Life Cycle controller 1045* USBserialport_S3B model for Qomu 1046* SAMD5 UART 1047* SAMD20 UART 1048* AES and Message Authentication cores for AthenaX5200 1049* LiteX MMCM controller in the 32-bit CSR width configuration 1050* LiteX Framebuffer in the 32-bit CSR width configuration 1051 1052Added demos: 1053 1054* Qomu running Zephyr shell 1055* SLTB004A running Gecko SDK baremetal CLI sample 1056 1057Added features: 1058 1059* guest-application profiling support 1060* TAP integration on Windows 1061* interrupt end hooks for RV64 1062* option for gathering execution metrics when running tests 1063* tests for logging from a sub-object 1064* PolarFireSoC Watchdog tests 1065* the disassembly output format to the Execution Tracer module 1066* option for filtering messages by log level in the log tester 1067 1068Changed: 1069 1070* improved support for ARMv8-M registers 1071* added option to compare raw values of selected registers in the gdb_compare script 1072* implemented generation of guest-host PC mappings info on block translation 1073* added `Frequency` property to ComparingTimer 1074* monitor-tests: Use virtual time in the pause test 1075* added static flushing to the logger 1076* included missing tools (like gdb_compare, sel4_extensions) in all packages 1077* added precompilation of Python scripts before running (to detect errors early) 1078* added user-specified file paths handling 1079* added filtering of ANSI escape codes from Robot tests keyword results 1080* added option to enable profiler globally in EmulationManager 1081* added command to disable automatic symbol switching in seL4 GDB extensions 1082* improved RISC-V kernel breakpoints support in seL4 GDB extensions 1083* code generator is now compiled with more aggressive optimizations 1084* changed the CPU class structure, allowing for core implementations not based on translation libraries 1085* updated the Nexys Video platform description and demo binaries 1086 1087Fixed: 1088 1089* 'Should Output Voice Data' test for QuickFeather 1090* various RISC-V vector instructions 1091* register values accessing in RISC-V 1092* help button behavior in AdvancedLoggerViewer 1093* concurrent access to Pixel Manipulation Tools 1094* clock residuum handling, e.g. improving the behavior of the BLE demo 1095* serialization of externals and GDB stub 1096* stacktrace reporting when exception is rethrown on the native-managed boundary 1097* packaging of license files from dependency projects 1098* exception handling on EnsureTypeIsLoaded 1099* various fixes in file handling layer 1100* improved handling of variables assigned to variables in the Monitor 1101* handling of multiple CPUs with different configurations in GDB 1102* STM32F413 RCC address 1103* DDR mapping in PolarFire SoC 1104* TCM memory size in miv_rv32 1105 1106Improvements in peripherals: 1107 1108* NVIC 1109* STM32F4_RCC 1110* STM32_ADC 1111* STM32_GPIOPort 1112* MiV_CoreGPIO 1113* GigaDevice_GD25LQ 1114* MC3635 1115* SynopsysEthernetMAC 1116* LiteSDCard_CSR32 1117* ResetPin 1118* HPSHostController 1119 11201.13.0 - 2022.04.29 1121------------------- 1122 1123Added platforms: 1124 1125* Xtensa sample controller stub 1126* MIMXRT1064-EVK 1127* STM32L552 1128* ARVSOM 1129* BeagleV StarLight 1130* Sparc GR716 1131* RISC-V virt 1132* S32K118 with LPIT, LPTMR, GPIO, Clock generator mock 1133* STM32G0 1134* STM32F412 1135* STM32H743 1136* MIV_RV32 1137 1138Added models: 1139 1140* new models for i.MX RT 1064: PWM, timer, ADC, LPSPI, Flex SPI, TRNG 1141* new models for nRF52840: RNG, Radio, Watchdog, ECB, PPI infrastructure 1142* new models for STM32: ADC, slave CAN, PWR, watchdog 1143* new models for OpenTitan: flash controller, timer, PLIC, HMAC, AES, KMAC, ROM controller, Key manager, Reset manager 1144* new models for Polarfire SoC: system services, user crypto features (RNG and RSA), Mustein GPU and various fixes to platform description 1145* new model for Zynq 7000: XADC 1146* new generic models: 1147 1148 * generic SPISensor 1149 * HostCamera device 1150 * TrivialUart 1151 * HPSHostController - fake I2C host master device for communicating with simulated devices 1152 * GigaDevice_GD25LQ - initial model 1153 * VirtIO block device model 1154 1155Added demos: 1156 1157* Murax SoC with verilated UART with simple echo demo 1158* LiteX with verilated CFU running CFU Playground demo 1159* Zynq with verilated FastVDMA running Linux 1160* NRF52840 BLE demo running Zephyr ``central_hr`` and ``peripheral_hr`` samples 1161* Leon3 running Zephyr shell 1162* GR716 running Zephyr shell 1163* Xtensa sample controller running Zephyr "Hello World" sample 1164 1165Added core features: 1166 1167* RISC-V: vector extension 1.0 support 1168* Xtensa architecture support 1169* RISC-V: access to proper set of registers + custom registers from GDB 1170* RISC-V: support for Custom Function Unit extensions 1171* WFE support on ARM cores 1172* uninterruptible debugging option to all architectures 1173* floating point support to Cortex-M platforms 1174* basic support for ARM 64-bit registers 1175* Cortex-M33 stub 1176* Sparc: added CSR register and exposed FSR register 1177 1178Added features: 1179 1180* primary selection copy support in TermSharp 1181* support for asciinema UART dumps 1182* support for native library communication in verilated peripherals 1183* APB3 bus implementation for VerilatorIntegrationLibrary 1184* support for loading HEX files 1185* video capture mechanism with host camera integration 1186* startup parameter for specifying the config file 1187* register access keywords for Robot Framework integration 1188* keyboard input in VideoAnalyzer on Windows 1189* option to stop on first error when running tests 1190* option to save failed test logs 1191* opcodes counting mechanism, along with RISC-V opcodes files parser 1192* execution tracing mechanism 1193* Wireshark support on Windows 1194* seL4-aware GDB debug support 1195* BLE wireless medium including Wireshark support 1196* gdb_compare script allowing to compare execution of two GDB instances, for example one connected to Renode and one to hardware 1197* support for vector registers in GDB 1198* CPU Id parameter in ARM cores 1199* option to control timestamp format and visibility in LoggingUartAnalyzer 1200* option to skip library fetch during build 1201* option to flush terminal history when connecting via socket 1202* support for external, bus-connected MMU 1203 1204Changed: 1205 1206* bumped Robot Framework version to ``4.0.1`` 1207* RobotFramework: log entries keywords now accept regex patterns 1208* STM: renamed some UART ports to USART 1209* ZynqEthernet: removed and replaced with CadenceGEM 1210* Zedboard: updated demo to Linux 5.10 1211* reworked CPU halting 1212* added CRC to packets sent by NetworkServer 1213* RISC-V: added logs on unhandled CSR accesses 1214* improved build time by changes to TermSharp project organization 1215* various updates to STM32F746 CPU definition 1216* added limit to displayed command history in AntShell 1217* moved output of Robot tests to current directory when running on Windows 1218* XWT events are now queued in GTK engine 1219* added option to reconnect to SocketServerProvider 1220* explicitly used XZ compression with pacman 1221* added option to limit function names logging to unique entries, vastly improving performance 1222* removed dependency to realpath from build and run scripts 1223* removed dependency to ZeroMQ 1224* renamed EOSS3_SPIMaster to DesignWare_SPI 1225* dropped Fedora version indicator from packages 1226* optimized RISC-V PMP handling 1227* reworked PlatformLevelInterruptController to operate on contexts instead of targets 1228* added O/H/W write commands to ArduinoLoader 1229* enabled TLS 1.1 and TLS 1.2 in CachingFileFetcher 1230* improved multicore debugging support in GDB 1231* allowed to reuse testers in Robot tests 1232* added option to safely include the same C# file multiple times during one Renode run 1233* added ``tests.yaml``, containing all Robot tests, to all packages 1234* add debug mode for all architectures disabling interrupts when stepping over guest code 1235* simplified fixture selection when running tests 1236* allowed unaligned memory access by default in IbexRiscV32 1237* added GDB support for VS bits in MSTATUS register 1238* added interrupts support in verilated peripherals 1239* added support for CPU registers wider than 64-bits in Renode (C# part, not tlibs) 1240* improved and unified the --plain mode handling 1241* refactored the disassembly handling subsystem 1242* improved GDB packets handling performance 1243* added option to control serialization mode in the configuration file 1244* added optional compiled files cache 1245* improved handling of exceptions at the C/C# boundary 1246* flattened the TimeFramework structure to increase performance 1247* improved performance of handling of truncated translation blocks 1248* improved performance of TermSharp height map calculations and row handling 1249* added several tlib performance optimizations 1250* added the synchronized timers emulation mode 1251* added support for the flow control in UART 1252* added support for bright colors to TermSharp 1253* added basic VSCode launch configurations for Renode on Mono 1254* unified ``renode`` and ``renode-test`` scripts names across all packages 1255* added support for per-core peripheral registration 1256* added option to the build script to export the build directory 1257* improved performance of ELF reloading 1258* updated Conda build scripts to better work with the latest Renode, improved Windows support 1259* added option to configure step for clock entries 1260* improved startup performance by skipping analysis of uninteresting assemblies in TypeManager 1261* tied the AutoRepaintingVideo refresh frequency to the virtual time flow 1262* enabled passing the -e parameter to Renode even when providing a script file parameter 1263* added option to preserve temporary files from Robot tests 1264* added a source of a log message to the log tester 1265* Provides and Requires keywords now use state snapshots 1266 1267Fixed: 1268 1269* CPU endianness handling in GDB register accesses 1270* SPARC WRASR and CASA instructions 1271* SPARC registers handling in GDB 1272* memory invalidation on writes in MappedMemory 1273* ARM instructions: ASX, SAX, SUB16 and UQSUB 1274* symbol name mangling on MacOS 1275* updating PC before raising MMU exception on RISC-V 1276* unaligned ld_phys handling, resolves problems of possible memory corruption 1277* possible race conditions in TerminalTester 1278* IO access path selection in tlib 1279* support for big-endian peripherals 1280* running tests in sequential mode 1281* HiFive Unleashed platform description including PHY advertisement and RAM size 1282* Ethernet PHY advertisement on the Zedboard platform 1283* cross-endian bus accesses 1284* endian conversion wrappers for untranslated accesses 1285* registers mapping of fflags/frm/fcsr, resolving GDB registers XML generation 1286* running tests when the build phase failed 1287* it-status unit test 1288* added LibLLVM to all packages 1289* whitespace handling in resc scripts on Windows 1290* occasional assertion fail when loading ELF files 1291* setting breakpoints on virtual addresses 1292* MicroPython tests 1293* installation on Linux with a separate /opt mount point 1294* demangling symbols from the anonymous namespace 1295* SoftFloat's type conversion functions 1296* illegal instruction exception on wrong CSR access on RISC-V 1297* support for quad words access on the system bus 1298* possible memory leak in tlib 1299* improved precision of calculations in BasicClockSource and ComparingTimer Fixed 1300* support for various versions of standard libraries on Linux hosts (libdl, libutil, etc) 1301* libc dependencies for the Renode portable package 1302* invalidation of translation blocks on writes 1303* handling big offsets in MappedMemory 1304* ARM-M PRIMASK and xPSR handling 1305* PowerPC registers listing in GDB 1306* improved tlib debugging by not omitting the frame pointer on debug build 1307* fixed sfence.vma instruction implementation for RISC-V 1308* potential math errors (underflows/overflows) when handling the virtual time 1309* handling input redirected from file in the console mode 1310* prevented GdbStub from sending telnet config bytes on new connections 1311* serialization of paused state 1312* ad-hoc compiler support in the portable package 1313* flushing of log tester 1314* UartPtyTerminal serialization 1315* reporting the exit code in renode-test 1316* RISC-V custom CSRs handling 1317* resetting of a machine from the context of another machine 1318* thread-safety of interrupt handling mechanism 1319* occasional dependency fail on static constructors 1320 1321Improvements in peripherals: 1322 1323* CoreLevelInterruptor 1324* PlatformLevelInterruptController 1325* NVIC 1326* CortexAPrivateTimer 1327* BMA180 1328* CC1200 1329* Micron_MT25Q 1330* SynopsysEthernetMAC 1331* K6xF_Ethernet 1332* CadenceGEM 1333* OV2640 1334* GaislerMIC 1335* PL011 1336* EFR32_USART 1337* LowPower_UART 1338* OpenTitan_UART 1339* OpenTitan_GPIO 1340* IMXRT_ADC 1341* IMXRT_LPSPI 1342* LPUART 1343* STM32F7_I2C 1344* STM32_UART 1345* STM32 RTC 1346* STM32_TIMER 1347* STM32DMA 1348* STMCAN 1349* EXTI 1350* NRF52840_CLOCK 1351* NRF52840_Timer 1352* NRF52840 GPIO 1353* LiteX_I2S 1354* Litex_GPIO 1355* MPFS_PDMA 1356* MPFS_DDRMock 1357* Gaisler_GPTimer 1358 13591.12.0 - 2021.04.02 1360------------------- 1361 1362Added: 1363 1364* STM32F072 platform, with the STM32F072b Discovery board 1365* i.MX RT1064 platform 1366* NRF52840 platform, with Arduino Nano 33 BLE Sense board 1367* OpenTitan EarlGrey RISC-V platform with a range of OpenTitan peripherals 1368* CV32E40P-based RISC-V platform with many PULP peripherals 1369* LiteX with RISC-V Ibex CPU platform support 1370* CrossLink-NX evaluation board 1371* ice40up5k-mdp-evn board 1372* Zephyr-based test suite for QuickLogic QuickFeather with EOS S3 1373* Tock demo on LiteX/VexRiscv and STM32F4 1374* Mbed demo on STM32F7 1375* integration with Arduino IDE and Arduino CLI 1376* Python Standard Library, to be used with Python hooks and scripts in Renode 1377* support for images in the Monitor, along with possibility to take framebuffer screenshots. This also works with certain terminal emulators, like iTerm2, when in headless mode 1378 1379 * option to connect UART to the running console, improving headless capabilities 1380 1381 * option to run Renode Monitor directly in console, overlapped with logs, using the ``--console`` command line switch 1382 1383* support for virtual addressing in GDB 1384* option to combine multiple interrupt or GPIO signals into one, using logical OR, directly in REPL files 1385* multi-bus support and AXI4 support (both as an initiator and a receiver) in co-simulation with Verilator 1386* ability to send synthetic network frames in Robot tests 1387* various sensor models: MC3635, LSM330, LSM303DLHC, LSM9DS1, LIS2DS12, BMP180 1388* seven-segment display model 1389* support for camera interfaces for nRF52840 and other platforms, along with a basic HM01B camera model 1390* support for sound data via PDM and I2S interfaces in nRF52840 and EOS S3 1391* 32-bit CSR versions of various LiteX peripherals 1392* ``window-height`` and ``window-width`` Renode config file options 1393 1394Changed: 1395 1396* ad hoc C# compilation now uses the same, bundled compiler on all OSes, also allowing for compilation in the portable Linux package 1397* bumped the officially supported Ubuntu version to 20.04 1398* added execution metrics analyzer to all Renode packages 1399* verilated peripherals can now also be used on Windows and on macOS 1400* verilated UART peripherals have updated protocol message numbers, requiring them to be recompiled to work with the latest Renode version 1401* moved to use openlibm instead of libm on Linux, improving portability 1402* GDB can now access memory across pages in a single access 1403* switched the unit testing framework from NUnit2 to NUnit3 1404* reduced the number of transitions between the C and C# code, improving performance 1405* improved performance of peripheral writes 1406* tests print the run summary at the end of the output, making it easier to spot errors 1407* revamped handling of the vectored interrupt mode for RISC-V cores 1408* RISC-V CPUs can now optionally allow for unaligned memory accesses 1409* updated the default privileged architecture version for VexRiscv CPU 1410* VexRiscv can now use standard RISC-V interrupt model 1411* changed the flow of NVIC interrupt handling, significantly improving performance 1412* STM32F7 DMA2D and LTDC now support more pixel blending modes 1413* reimplemented and modernized several STM32 peripherals 1414* improved the model of K6xF Ethernet controller 1415* LiteSDCard model now supports DMA interface 1416* EXTI controller now has a configurable number of output lines 1417* improved handling of dummy bytes in MPFS QSPI 1418 1419Fixed: 1420 1421* tests running from installed Renode packages creating output files in forbidden locations 1422* serialization of NetworkInterfaceTester and UARTBackend 1423* possible non-deterministic behavior of UART backend in tests 1424* occasional file sharing violation in PosixFileLocker 1425* Renode printing out colors when in plain mode 1426* non-determinism in the button model 1427* time drift caused by unreported virtual ticks and improper instruction counting 1428* crash in TermsharpProvider when running on Windows 1429* invalid default frequency for STM32L1 1430 14311.11.0 - 2020.10.22 1432------------------- 1433 1434Added: 1435 1436* support for generating execution metrics, covering information like executed instructions count, memory and peripheral accesses, and interrupt handling 1437* infrastructure for reporting supported CPU features to GDB 1438* tests for Icicle Kit with PolarFire SoC 1439* ``--debug-on-error`` option for ``renode-test`` allowing interactive debugging of failed Robot tests 1440* ``lastLog`` Monitor command displaying ``n`` last log messages 1441* ``currentTime`` monitor command with information about elapsed host and virtual time 1442* ``WriteLine`` UART helper method to feed strings from the Monitor or scripts 1443* support for non-base RISC-V instruction sets disassembly 1444* support for custom Robot test results listeners 1445* support for Python-based implementation of (stateful) custom CSRs and custom instructions in RISC-V 1446* option to control RISC-V CSR access validation level interactively 1447* dummy support for data cache flush instruction in VexRiscv 1448* 64-bit decrementer support in PowerPC 1449* nRF52840 RTC model 1450* STM32F4 RTC model 1451* STM32F4 RCC stub model 1452* unified timer model for STM32F4 and STM32L1 platforms 1453* support for ATAPI CD-ROM 1454* burst read support in OpenCores I2C 1455 1456Changed: 1457 1458* time flow settings in Icicle Kit script now ensure full determinism 1459* all testers (for UART, LED, network, sysbus accesses and log messages) now rely on virtual time instead of host time and accept floating point timeouts 1460* portable package now includes requirements.txt file 1461* skipped tests do not generate save files anymore 1462* ``Clear`` Monitor command does not remove current working directory from searched paths 1463* WFI handling in RISC-V is simplified, improving performance on sleepy systems 1464* translation block fetch logger messages are now logged with Info instead of Debug level 1465* Cortex-M CPUs now reports their registers to GDB 1466* several infrastructural changes in the PCI subsystem 1467* STM32L1 oscillators are now all reported as ready 1468 1469Fixed: 1470 1471* Renode logo appearing in UART analyzer windows when running without Monitor 1472* logs not being fully written out when terminating Renode 1473* keyboard event detection in framebuffer window when no pointer device is attached 1474* crash when the logger console reports width equal to 0 1475* crash of ad-hoc compilation on Renode portable. Note that this still requires a C# compiler to be available on the host system 1476* crash when connecting GDB with the first core not being connected 1477* occasional crash when providing incorrect CLI arguments 1478* invalid disassembly of 64-bit RISC-V instructions 1479* crash on machine reset when using custom CSRs in RISC-V 1480* handling of multi-byte reads in LiteX I2C model 1481* handling of images with unaligned size in USB pen drive 1482* invalid LED connections in STM32F4 1483 14841.10.1 - 2020.07.30 1485------------------- 1486 1487This is a hotfix release overriding 1.10.0. 1488 1489Fixed: 1490 1491* crash on Windows when accessing high memory addresses 1492* installation instructions in README 1493 14941.10.0 - 2020.07.28 1495------------------- 1496 1497Added: 1498 1499* support for the PolarFire SoC-based Icicle Kit platform, with a demo running Linux 1500* experimental support for OpenPOWER ISA 1501* support for NXP K64F with UART, Ethernet and RNG 1502* basic support for Nordic nRF52840 1503* Microwatt platform, with Potato UART, running MicroPython or Zephyr 1504* LiteX platform with a 4-core VexRiscv in SMP 1505* LiteX demo running Microwatt as a CPU 1506* LiteX demo with VexRiscv booting Linux from the SD card 1507* LiteX demo with VexRiscv showing how to handle input and output via I2S 1508* LiteX MMCM model, I2S model and SD card controller model 1509* several peripheral models for QuickLogic EOS S3: ADC, SPI DMA, Packet FIFO, FFE etc 1510* ADXL345 accelerometer model 1511* PAC1934 power monitor model 1512* PCM encoder/decoder infrastructure for providing audio data to I2S devices 1513* modular network server allowing to easily add server components to the emulation without a host-to-guest connection 1514* built-in TFTP server module 1515* file backend for UARTs, allowing to send output directly to a file (``uart CreateFileBackend``) 1516* ``alias`` Monitor command 1517* ``console_log`` Monitor command to simply print to the log window without level filtering 1518* ``--no-gui`` build option to build without graphical dependencies 1519* option to define an average cycles count per instruction, to be used by CPU counters 1520* code formatting rules for translation libraries, to be used with Uncrustify 1521 1522Changed: 1523 1524* Renode is now able to be compiled with ``mcs``. This means that you can use your distribution's Mono package instead of the one provided by mono-project.com, as long as it satisfies the minimum version requirement (currently Mono 5.2) 1525* the default log level is now set to ``INFO`` instead of ``DEBUG`` 1526* all PolarFire SoC peripherals are now renamed from PSE_* to MPFS_*, to follow Microchip's naming pattern 1527* major rework of the SD card model, along with the added SPI interface 1528* RI5CY core can now be created with or without FPU support 1529* STM32 and SAM E70 platforms now have verified ``priorityMask`` in NVIC 1530* Cortex-M based platforms can now be reset by writing to NVIC 1531* easy way to update timer values between synchronization phases, significantly improving the performance of polling on timers 1532* tests are now able to run in parallel, using the ``-j`` switch in the testing script execution 1533* the pattern for download links in scripts for binaries hosted by Antmicro has been changed 1534* portable package now includes testing infrastructure and sample tests 1535* the LLVM-based disassembly library is now rebuilt, using less space and being able to support more architectures on all host OSes 1536* the C++ symbol demangling now relies on a `CxxDemangler <https://github.com/southpolenator/CxxDemangler>`_ library, instead of libstdc++ 1537* failed Robot tests will now produce snapshots allowing users to debug more easily 1538* SVD-based log messages on reads and writes are now more verbose 1539* Terminal Tester API has changed slightly, allowing for easier prompt detection, timeout control etc. 1540 1541Fixed: 1542 1543* crash when running tests with empty ``tests.yaml`` file 1544* crash when Renode is unable to find the root directory 1545* crash when loading broken or incompatible state snapshot with ``Load`` 1546* several issues in the PPC architecture 1547* ``mstatus`` CSR behaviour when accessing FP registers in RISC-V 1548* PMP napot decoding in RISC-V 1549* evaluation of the IT-state related status codes in ARM CPUs 1550* invalid setting of CPUID fields in x86 guests 1551* PolarFire SoC platform description and various models: CAN, SPI, SD controller, etc. 1552* ``ODR`` register behavior in STM32F1 GPIO port 1553* ``State changed`` event handling in LED model 1554* invalid disposal of the SD card model, possibly leading to filesystem sharing violations 1555* some cursor manipulation commands in TermSharp 1556* performance issues when hitting breakpoints with GDB 1557* on the fly compilation of "*.cs" files in the portable Renode package 1558* Mono Framework version detection 1559* upgrading Renode version on Windows when installed using the ``msi`` package 1560* error message when quitting Renode on Windows 1561* running tests from binary packages 1562* support for testing in Conda Renode package 1563* other various fixes in Conda package building 1564 15651.9.0 - 2020.03.10 1566------------------ 1567 1568Breaking changes: 1569 1570* the Renode configuration directory was moved to another location. 1571 1572 The directory is moved from ``~/.renode`` on Unix-like systems and ``Documents`` on Windows to 1573 ``~/.config/renode`` and ``AppData\Roaming\renode`` respectively. To use your previous settings 1574 and Monitor history, please start Renode 1.9 and copy your old config folder over the new one. 1575 1576Added: 1577 1578* support for RISC-V Privileged Architecture 1.11 1579* EOS S3 platform, with QuickFeather and Qomu boards support 1580* EFR32MG13 platform support 1581* Zolertia Firefly dual radio (CC2538/CC1200) platform support 1582* Kendryte K210 platform support 1583* NeTV2 with LiteX and VexRiscv platform support 1584* EFR32 timer and gpcrc models 1585* CC2538 GPIO controller and SSI models 1586* CC1200 radio model 1587* MAX3421E USB controller model 1588* LiteX SoC controller model 1589* support for Wishbone bus in verilated peripherals, exemplified with the ``riscv_verilated_liteuart.resc`` sample 1590* one-shot mode in AutoRepaintingVideo allowing display models to control when they are refreshed 1591* ``GetItState`` for ARM Cortex-M cores allowing to verify the current status of the IT block 1592* scripts to create Conda packages for Linux, Windows and macOS 1593* requirements.txt with Python dependencies to simplify the compilation process 1594* configuration option to collapse repeated lines in the log - turn it to false if you observe strange behavior of the log output 1595 1596Changed: 1597 1598* VexRiscv now supports Supervisor level interrupts, following latest changes to this core 1599* PolarFire SoC script now has a sample binary, running FreeRTOS with LwIP stack 1600* the output of Robot test is now upgraded to clearly indicate time of execution 1601* NetworkInterfaceKeywords now support wireless communication 1602* exposed several RISC-V registers to the Monitor 1603* VerilatedUART now supports interrupts 1604* tests file format was changed to yaml, thus changing tests.txt to tests.yaml 1605* test.sh can now run NUnit tests in parallel 1606* ``./build.sh -p`` will no longer build the portable Linux package as it requires a very specific Mono version 1607* path to ``ar`` can now be specified in the properties file before building 1608* MinGW libraries are now compiled in statically, significantly reducing the Windows package size 1609 1610Fixed: 1611 1612* crash when trying to set the underlying model for verilated peripheral in REPL 1613* crash when copying data from the terminal to clipboard on Windows 1614* crash on loading missing FDT file 1615* crash when starting the GDB server before loading the platform 1616* handling of very long commands via GDB 1617* improper window positioning when running on Windows with a display scaling enabled 1618* exception reporting from running CPUs 1619* flushing of closing LoggingUartAnalyzer 1620* icon installation on Fedora 1621* rebuilding translation libraries when only a header is changed 1622* macOS run scripts bundled in packages 1623* priority level handling in NVIC 1624* COUNTFLAG handling in NVIC 1625* several improvements in Cadence GEM frame handling 1626* FastRead operations in Micron MT25Q flash 1627* PolarFire SoC Watchdog forbidden range handling 1628* offset calculation on byte accesses in NS16550 model 1629* interrupt handling in PolarFire SoC QSPI model 1630* connected pins state readout in PolarFire SoC GPIO model 1631* several fixes in HiFive SPI model 1632* page latch alignment in PolarFire SoC 1633 16341.8.2 - 2019.11.12 1635------------------ 1636 1637Added: 1638 1639* a sample running HiFive Unleashed with Fomu running Foboot, connected via USB 1640* a sample running MicroPython on LiteX with VexRiscv 1641* vectored interrupts support in RISC-V 1642* ``pythonEngine`` variable is now availalbe in Python scripting 1643 1644Changed: 1645 1646* Renode now requires Mono 5.20 on Linux and macOS 1647* USB setup packets are now handled asynchronously, allowing more advanced processing on the USB device side 1648* additional flash sizes for Micron MT25Q 1649* LiteX_Ethernet has a constant size now 1650 1651Fixed: 1652 1653* problem with halting cores in GDB support layer when hitting a breakpoint - GDB works in a proper all-stop mode now 1654 16551.8.1 - 2019.10.09 1656------------------ 1657 1658Added: 1659 1660* LiteX with VexRiscv configuration running Zephyr 1661* USB/IP Server for attaching Renode peripherals as a USB device to host 1662* optional NMI support in RISC-V 1663* flash controller for EFR32 1664* I2C controller for LiteX 1665* SPI controller for PicoRV 1666* framebuffer controller for LiteX 1667* USB keyboard model 1668 1669Changed: 1670 1671* ``-e`` parameter for commands executed at startup can be provided multiple times 1672* ``polarfire`` platform is now renamed to ``polarfire-soc`` 1673* style of Robot Framework result files 1674* MT25Q flash backend has changed from file to memory, allowing software to execute directly from it 1675* improved LiteX on Fomu platform 1676* terminals based on sockets now accept reconnections from clients 1677 1678Fixed: 1679 1680* ``Bad IL`` exceptions when running on Mono 6.4 1681 16821.8.0 - 2019.09.02 1683------------------ 1684 1685Added: 1686 1687* support for RI5CY core and the VEGA board 1688* UART and timer models for RI5CY 1689* support for Minerva, a 32-bit RISC-V soft CPU 1690* LiteX with Minerva platform 1691* LiteX with VexRiscv on Arty platform 1692* SPI, Control and Status, SPI Flash and GPIO port peripheral models for LiteX 1693* PSE_PDMA peripheral model for the PolarFire SoC platform 1694* basic slave mode support in PSE_I2C 1695* EtherBone bridge model to connect Renode with FPGA via EtherBone 1696* EtherBone bridge demo on Fomu 1697* RTCC and GPCRC peripheral models for EFR32 1698* support for deep sleep on Cortex-M cores 1699* option of bundling Renode as an ELF executable on Linux 1700 1701Changed: 1702 1703* GDB server is now started from the ``machine`` level instead of ``cpu`` and is able to handle multiple cores at once 1704* renamed ``SetLossRangeWirelessFunction`` to ``SetRangeLossWirelessFunction`` 1705* LiteX Ethernet now supports the MDIO interface 1706* updated memory map for several EFR32 platforms 1707* changed the interrupt handling of EFR32_USART 1708* several changes in Ethernet PHY 1709* switch is now started immediately after creation 1710* the Monitor (and other mechanisms) now uses caching, increasing its performance 1711* Robot tests are now part of packages 1712* Robot tests no longer cause the Monitor telnet server to start automatically 1713* REPL files now accept multiline strings delimited with triple apostrophe 1714* UART analyzers are writing to the Renode log when running from Robot 1715* simplified command line switches for running Robot tests 1716* some Robot keywords (e.g. ``LogToFile``) are not saved between related tests 1717 1718Fixed: 1719 1720* compilation of verilated peripheral classes in Windows (backported to 1.7.1 package) 1721* determinism of SAM E70 tests 1722* crash when using ``logLevel`` command with ``--hide-log`` switch 1723* ad-hoc compiler behavior in Windows 1724* crash on too short Ethernet packets 1725* byte read behavior in NS16550 1726* auto update behavior of PSE_Timer 1727* connection mode when running the Monitor via telnet 1728* deserialization of ``SerializableStreamView`` 1729* crash when completing interrupts in PLIC when no interrupt is pending 1730* Renode startup position on Windows with desktop scaling enabled 1731* fence.* operation decoding in RISC-V 1732* invalid size reported by SD card 1733* crash when trying to set the same log file twice 1734* compilation issues on GCC 9 1735 1736 17371.7.1 - 2019.05.15 1738------------------ 1739 1740Added: 1741 1742* integration layer for Verilator 1743* base infrastructure for verilated peripherals 1744* base class for verilated UARTs, with analyzer support 1745* Linux on LiteX with VexRiscv demo 1746 1747Changed: 1748 1749* RISC-V CPUs now don't need CLINT in their constructor, but will accept any abstract time provider 1750* updated LiteX with PicoRV32 and LiteX with VexRiscv platform 1751 1752Fixed: 1753 1754* sharing violation when trying to run downloaded files 1755 17561.7.0 - 2019.05.02 1757------------------ 1758 1759Added: 1760 1761* PicoRV32 CPU 1762* LiteX platform with PicoRV32 1763* LiteX timer and ethernet (LiteEth) model 1764* Murax SoC with UART, timer and GPIO controller models 1765* Fomu target support with LiteX and VexRiscv 1766* SAM E70 Xplained platform with USART, TRNG and ethernet controller models 1767* STM32F4 Random Number Generator model 1768* PSE watchdog model 1769* PTP support in Cadence GEM ethernet model, along with several fixes 1770* option to execute CPUs in serial instead of parallel 1771* support for custom instructions in RISC-V 1772* ``empty`` keyword in REPL 1773* graphical display analyzer support on Windows 1774* multi-target GPIO support, along with the new REPL syntax 1775* local interrupts in PolarFire SoC platform 1776* option to pass variables to Robot tests via test.sh 1777* some SiFive FU540 tests 1778* network interface tester for Robot tests 1779* tests for PTP implementation in Zephyr 1780 1781Changed: 1782 1783* Micron MT25Q is now able to use file as a backend and does not need to have a separate memory provided in REPL 1784* Micron MT25Q now has selectable endianess 1785* ``logFile`` command will now create a copy of the previous log before overwriting it 1786* ``sysbus LogPeripheralAccess`` will now add the active CPU name and current PC to log messages 1787* single-stepping of a CPU is now easier, it requires only a single call to ``cpu Step`` on a paused CPU 1788* NVIC reload value is now 24-bit 1789* reimplemented the STM32_UART model 1790* updated the PolarFire SoC memory map 1791* updated the SiFive FU540 memory map 1792* ``GetClockSourceInfo`` will now display the name of the timer 1793* Termsharp will no longer print the NULL character 1794* RISC-V cores will now abort when trying to run a disabled F/D instruction 1795 1796Fixed: 1797 1798* handling of divider in ComparingTimer 1799* reporting of download progress on some Mono versions 1800* running Robot tests on Windows 1801* generation of TAP helper on newest Mono releases 1802* Renode crashing after opening a socket on the same port twice 1803* serialization of data storage structures 1804* architecture name reported on GDB connection for Cortex-M CPUs 1805* highlighting of wrapped lines in the terminal on Windows 1806* TAB completion in the Monitor on Windows 1807* RNG determinism and serialization for multicore/multi-node systems 1808* SiFive FE310 interrupt connection 1809* instruction counting in RISC-V on MMU faults 1810* time progress in multicore systems 1811* fixes in MiV GPIO controller model 1812* several fixes and improvements in file backend storage layer 1813* several fixes in testing scripts 1814* several fixes in various LiteX peripherals 1815* several fixes in PSE QSPI and Micron MT25Q model 1816 18171.6.2 - 2019.01.10 1818------------------ 1819 1820Added: 1821 1822* instructions on running in Docker 1823* --pid-file option to save Renode's process ID to a file 1824 1825Changed: 1826 1827* RISC-V X0 register is now protected from being written from the Monitor 1828* Renode will now close when it receives a signal from the environment (e.g. Ctrl+C from the console window) 1829* invalid instructions in RISC-V will no longer lead to CPU abort - an exception will be issued instead, to be handled by the guest software 1830* Robot tests will now log more 1831 1832Fixed: 1833 1834* formatting of symbol logging 1835* error reporting in Robot tests using the ``Requires`` keyword 1836* Microsemi's Mi-V CPU description 1837 18381.6.1 - 2019.01.02 1839------------------ 1840 1841Added: 1842 1843* CC2538 Flash Controller 1844* ECB mode for CC2538 Cryptoprocessor 1845 1846Changed: 1847 1848* unhandled read/write logs are now decorated with the CPU name instead of the number 1849* message acknowledge logic on PolarFire CAN controller 1850 1851Fixed: 1852 1853* race condition in PromptTerminal used by the Robot Framework 1854* Monitor socket not opening in certain situations 1855* unaligned accesses in RISC-V not setting the proper badaddr value 1856* handling of data exceeding the maximum packet size of USB endpoint 1857* memory map and CPU definition for SiFive FE310 1858* out of bounds access when using Ctrl+R with wrapped lines in the Monitor 1859 18601.6.0 - 2018.11.21 1861------------------ 1862 1863Added: 1864 1865* new USB infrastructure 1866* new PCI infrastructure 1867* PolarFire SoC platform support 1868* atomic instructions on RISC-V 1869* basic PicoSoC support - the picorv32 CPU and UART 1870* block-finished event infrastructure - verified on RISC-V and ARM cores 1871* more PSE peripherals: RTC, PCIe controller, USB controller, QSPI, CAN, etc 1872* Micron MT25Q flash model 1873* ``watch`` command to run Monitor commands periodically 1874* a message on the Monitor when quitting Renode 1875* qXfer support for GDB, allowing the client to autodetect the architecture 1876* log tester for Robot Framework 1877 1878Changed: 1879 1880* added error handling for uninitialized IRQ objects in REPL loading 1881* RISC-V CSR registers are now accessible in relevant privilege architecture version only 1882* RISC-V CPUs no longer require CLINT provided as a constructor parameter 1883* added second timer interrupt to PSE_Timer 1884* machine.GetClockSourceInfo now prints the current value for each clock entry 1885* REPL loading tests are now in Robot 1886* value provider callbacks on write-only fields will generate exceptions 1887* watchpoint handling infrastructure 1888* reworked single stepping 1889* Monitor errors are forwarded to the GDB client when issuing qRcmd 1890* LoadELF command initializes PC on all cores by default 1891* reduced the default synchronization quantum 1892* CPU abort now halts the emulation 1893* --disable-xwt no longer requires opening a port 1894* RISC-V atomic instructions now fail if the A instruction set is not enabled 1895 1896Fixed: 1897 1898* pausing and halting the CPU from hooks 1899* error when trying to TAB-complete nonexisting paths 1900* packaging script on Windows 1901* crash on extremely narrow Terminal on Windows 1902* inconsistent cursor position when erasing in Termsharp 1903* selection of multibyte UTF characters on Linux 1904* scrollbar behavior on Windows 1905* error reporting from executed commands in Robot 1906* RISC-V cores reset 1907* several fixes in time framework 1908* output pin handling and interrupt clearing in PSE_GPIO 1909* minor fixes in PSE_SPI 1910* throwing invalid instruction exception on wrong CSR access in RISC-V 1911* CPU abort will now stop the failing CPU 1912 1913 19141.5.0 - 2018.10.03 1915------------------ 1916 1917Added: 1918 1919* custom CSR registers in RISC-V 1920* VexRiscv CPU 1921* basic LiteX platform with VexRiscv 1922* LiteX VexRiscv demo with Zephyr 1923* single and multinode CC2538 demos with Contiki-NG 1924* PSE peripherals 1925* several tests for demos and internal mechanisms 1926* base classes for bus peripherals, allowing for easier definition of registers 1927 1928Changed: 1929 1930* installation instructions in README 1931* the target .NET version changed to 4.5 reducing the number of dependencies 1932* forced mono64 on macOS 1933* renamed the multinode demos directory 1934* RISC-V CPUs now generate an exception on unaligned memory reads and writes 1935* CLINT is now optional for RISC-V CPUs 1936* reimplemented FileStreamLimitWrapper 1937 1938Fixed: 1939 1940* first line blinking in terminal on Windows 1941* performance fixes in function logging 1942* handling of broken CSI codes in Termsharp 1943* completely removed the GTK dependency on Windows 1944* handling of CheckIfUartIsIdle Robot keyword 1945* resetting of RISC-V-based platforms 1946* prevented a rare crash on disposing multicore platforms when using hooks 1947* handling of unsupported characters in Robot protocol 1948* Windows installer correctly finds the previous Renode installation (may require manual deinstallation of the previous version) 1949* compilation of translation libraries on Windows is no longer forced on every Renode recompilation 1950 1951 19521.4.2 - 2018.07.27 1953------------------ 1954 1955Added: 1956 1957* debug mode in RISC-V, masking interrupts and ignoring WFI when connected via GDB 1958* installer file for Windows 1959* GPIO controller for STM32F103, with other improvements to the platform file 1960* PWM, I2C and SPI peripherals for HiFive Unleashed 1961* tests for HiFive Unleashed 1962* configuration option to always add machine name in logs 1963* test scripts when installing Renode from a package on Linux 1964 1965Changed: 1966 1967* changed gksu dependency to pkexec, as Ubuntu does not provide gksu anymore 1968* virtual time of machines created after some time is synchronized with other machines 1969* improved Vector Table Offset guessing when loading ELF files on ARM Cortex-M CPUs 1970* extended capabilities of some Robot keywords 1971* changed the way peripheral names are resolved in logs, so that they don't disappear when removing the emulation 1972 1973Fixed: 1974 1975* support for writing 64-bit registers from GDB 1976* crash when trying to connect to a nonexisting interrupt 1977* GDB access to Cortex-M registers 1978* some fixes in EFR32_USART 1979 1980 19811.4.1 - 2018.06.28 1982------------------ 1983 1984Added: 1985 1986* AXI UART Lite model 1987 1988Changed: 1989 1990* event dispatching on WPF on Windows 1991 1992Fixed: 1993 1994* an error in handling of generated code on Windows, causing the emulated application to misbehave 1995* font loading and default font size on Windows 1996 19971.4.0 - 2018.06.22 1998------------------ 1999 2000Added: 2001 2002* support for RISC-V Privileged Architecture 1.10 2003* 64-bit RISC-V target emulation 2004* support for HiFive Unleashed platform 2005* support for SiFive Freedom E310 platform 2006* new way of handling time progression and synchronization in the whole framework 2007* support for 64-bit registers 2008* basic support for a range of SiLabs EFM32, EFR32 and EZR32 MCUs 2009* several new Robot keywords 2010* Wireshark support for macOS 2011 2012Changed: 2013 2014* Windows runs a 64-bit version of Renode 2015* 32-bit host OSes are no longer supported 2016* Robot tests can now be marked as OS-specific or ignored 2017* improvements in CC2538 radio model 2018* enum values in REPL files can now be provided as integers 2019* updated interrupt model in RISC-V 2020* MaximumBlockSize is no longer forced to 1 when starting GDB server 2021 2022Fixed: 2023 2024* several fixes in REPL grammar 2025* fixes in Robot test handling 2026* fixes in GDB watchpoints and breakpoints 2027* few other fixes in GDB integration layer 2028* floating point operations in RISC-V 2029* atomic operations in RISC-V 2030* high CPU usage when loading many nodes at the same time 2031* deserialization of the UART windows 2032* symbol names caching when loading new symbol files 2033* several minor fixes in different platform files 2034 20351.3.0 - 2018.01.26 2036------------------ 2037 2038Added: 2039 2040* EmulationEnvironment - a mechanism to handle sensor data in a centralized way 2041* test for loading REPL files 2042* several registers and commands in CC2538RF 2043* SCSS device for QuarkC1000 platform 2044* sample scripts with two nodes running a Zephyr demo 2045 2046Changed: 2047 2048* ComparingTimer and LimitTimer are now more similar in terms of API 2049* macOS runs a 64-bit version of Renode 2050* changed Arduino 101 with CC2520 board to Quark C1000 devkit 2051* improvements in RISC-V interrupt handling 2052* current working directory is now always a part of Monitor's default path 2053 2054Fixed: 2055 2056* crash when closing Renode with Wireshark enabled but not yet started 2057* handling of timer events for a specific timer configuration 2058* implementation of LED tester 2059* starting Robot on Windows without administrative privileges 2060* terminal state after running Robot tests 2061* improper timer initialization in RISC-V's CoreLevelInterruptor 2062* text highlighting in wrapped lines in terminal windows 2063 20641.2.0 - 2017.11.15 2065------------------ 2066 2067Added: 2068 2069* support for RISC-V architecture 2070* support for Microsemi Mi-V platform 2071* thin OpenOCD layer in GDB remote protocol support 2072 2073Changed: 2074 2075* timers can now hold values up to 64 bits 2076* ``Button`` peripheral can now have inverted logic 2077* GDB server can be configured to autostart after the first "monitor halt" received 2078 2079Fixed: 2080 2081* translation cache invalidation on manual writes to memory 2082* reset of ``LimitTimer`` peripheral, which is the base for most of the supported timers 2083 20841.1.0 - 2017.11.14 2085------------------ 2086 2087Added: 2088 2089* sample scripts for different platforms 2090* support for running Renode on Windows 2091* EFR32MG cpu support. For the list of peripherals, see efr32mg.repl 2092* more robust support for SVD files 2093* support for '\n -> \r\n' patching in Termsharp console windows 2094* support for font configuration in Termsharp 2095* support for CRC in Ethernet 2096* packaging scripts 2097 2098Changed: 2099 2100* API for UART-related keywords in Robot Framework integration layer 2101* the project infrastructure now supports C# 7.0 2102* directory organization 2103 2104Fixed: 2105 2106* several minor fixes in platform description format (.repl) 2107* bug where Renode hanged after issuing the "help" command in the Monitor 2108 21091.0.0 - 2017.06.13 2110------------------ 2111 2112This is the initial release of Renode. 2113Renode is a virtual development and testing tool for multinode embedded networks. 2114For more information please visit `<https://www.renode.io>`_. 2115 2116
