1 /********************************************************
2 *
3 * Warning!
4 * This file was generated automatically.
5 * Please do not edit. Changes should be made in the
6 * appropriate *.tt file.
7 *
8 */
9 using System;
10 using System.Linq;
11 using System.Collections.Generic;
12 using Antmicro.Renode.Peripherals.CPU.Registers;
13 using Antmicro.Renode.Utilities.Binding;
14 using Antmicro.Renode.Exceptions;
15 
16 namespace Antmicro.Renode.Peripherals.CPU
17 {
18     public partial class Sparc
19     {
SetRegister(int register, RegisterValue value)20         public override void SetRegister(int register, RegisterValue value)
21         {
22             if(!mapping.TryGetValue((SparcRegisters)register, out var r))
23             {
24                 throw new RecoverableException($"Wrong register index: {register}");
25             }
26 
27             SetRegisterValue32(r.Index, checked((uint)value));
28         }
29 
GetRegister(int register)30         public override RegisterValue GetRegister(int register)
31         {
32             if(!mapping.TryGetValue((SparcRegisters)register, out var r))
33             {
34                 throw new RecoverableException($"Wrong register index: {register}");
35             }
36             return GetRegisterValue32(r.Index);
37         }
38 
GetRegisters()39         public override IEnumerable<CPURegister> GetRegisters()
40         {
41             return mapping.Values.OrderBy(x => x.Index);
42         }
43 
44         [Register]
45         public RegisterValue Y
46         {
47             get
48             {
49                 return GetRegisterValue32((int)SparcRegisters.Y);
50             }
51             set
52             {
53                 SetRegisterValue32((int)SparcRegisters.Y, value);
54             }
55         }
56         [Register]
57         public RegisterValue PSR
58         {
59             get
60             {
61                 return GetRegisterValue32((int)SparcRegisters.PSR);
62             }
63             set
64             {
65                 SetRegisterValue32((int)SparcRegisters.PSR, value);
66             }
67         }
68         [Register]
69         public RegisterValue WIM
70         {
71             get
72             {
73                 return GetRegisterValue32((int)SparcRegisters.WIM);
74             }
75             set
76             {
77                 SetRegisterValue32((int)SparcRegisters.WIM, value);
78             }
79         }
80         [Register]
81         public RegisterValue TBR
82         {
83             get
84             {
85                 return GetRegisterValue32((int)SparcRegisters.TBR);
86             }
87             set
88             {
89                 SetRegisterValue32((int)SparcRegisters.TBR, value);
90             }
91         }
92         [Register]
93         public override RegisterValue PC
94         {
95             get
96             {
97                 return GetRegisterValue32((int)SparcRegisters.PC);
98             }
99             set
100             {
101                 SetRegisterValue32((int)SparcRegisters.PC, value);
102                 AfterPCSet(value);
103             }
104         }
105         [Register]
106         public RegisterValue NPC
107         {
108             get
109             {
110                 return GetRegisterValue32((int)SparcRegisters.NPC);
111             }
112             set
113             {
114                 SetRegisterValue32((int)SparcRegisters.NPC, value);
115             }
116         }
117         [Register]
118         public RegisterValue FSR
119         {
120             get
121             {
122                 return GetRegisterValue32((int)SparcRegisters.FSR);
123             }
124             set
125             {
126                 SetRegisterValue32((int)SparcRegisters.FSR, value);
127             }
128         }
129         [Register]
130         public RegisterValue CSR
131         {
132             get
133             {
134                 return GetRegisterValue32((int)SparcRegisters.CSR);
135             }
136             set
137             {
138                 SetRegisterValue32((int)SparcRegisters.CSR, value);
139             }
140         }
141         public RegistersGroup R { get; private set; }
142         public RegistersGroup ASR { get; private set; }
143 
InitializeRegisters()144         protected override void InitializeRegisters()
145         {
146             var indexValueMapR = new Dictionary<int, SparcRegisters>
147             {
148                 { 0, SparcRegisters.R0 },
149                 { 1, SparcRegisters.R1 },
150                 { 2, SparcRegisters.R2 },
151                 { 3, SparcRegisters.R3 },
152                 { 4, SparcRegisters.R4 },
153                 { 5, SparcRegisters.R5 },
154                 { 6, SparcRegisters.R6 },
155                 { 7, SparcRegisters.R7 },
156                 { 8, SparcRegisters.R8 },
157                 { 9, SparcRegisters.R9 },
158                 { 10, SparcRegisters.R10 },
159                 { 11, SparcRegisters.R11 },
160                 { 12, SparcRegisters.R12 },
161                 { 13, SparcRegisters.R13 },
162                 { 14, SparcRegisters.R14 },
163                 { 15, SparcRegisters.R15 },
164                 { 16, SparcRegisters.R16 },
165                 { 17, SparcRegisters.R17 },
166                 { 18, SparcRegisters.R18 },
167                 { 19, SparcRegisters.R19 },
168                 { 20, SparcRegisters.R20 },
169                 { 21, SparcRegisters.R21 },
170                 { 22, SparcRegisters.R22 },
171                 { 23, SparcRegisters.R23 },
172                 { 24, SparcRegisters.R24 },
173                 { 25, SparcRegisters.R25 },
174                 { 26, SparcRegisters.R26 },
175                 { 27, SparcRegisters.R27 },
176                 { 28, SparcRegisters.R28 },
177                 { 29, SparcRegisters.R29 },
178                 { 30, SparcRegisters.R30 },
179                 { 31, SparcRegisters.R31 },
180             };
181             R = new RegistersGroup(
182                 indexValueMapR.Keys,
183                 i => GetRegister((int)indexValueMapR[i]),
184                 (i, v) => SetRegister((int)indexValueMapR[i], v));
185 
186             var indexValueMapASR = new Dictionary<int, SparcRegisters>
187             {
188                 { 16, SparcRegisters.ASR16 },
189                 { 17, SparcRegisters.ASR17 },
190                 { 18, SparcRegisters.ASR18 },
191                 { 19, SparcRegisters.ASR19 },
192                 { 20, SparcRegisters.ASR20 },
193                 { 21, SparcRegisters.ASR21 },
194                 { 22, SparcRegisters.ASR22 },
195                 { 23, SparcRegisters.ASR23 },
196                 { 24, SparcRegisters.ASR24 },
197                 { 25, SparcRegisters.ASR25 },
198                 { 26, SparcRegisters.ASR26 },
199                 { 27, SparcRegisters.ASR27 },
200                 { 28, SparcRegisters.ASR28 },
201                 { 29, SparcRegisters.ASR29 },
202                 { 30, SparcRegisters.ASR30 },
203                 { 31, SparcRegisters.ASR31 },
204             };
205             ASR = new RegistersGroup(
206                 indexValueMapASR.Keys,
207                 i => GetRegister((int)indexValueMapASR[i]),
208                 (i, v) => SetRegister((int)indexValueMapASR[i], v));
209 
210         }
211 
212         // 649:  Field '...' is never assigned to, and will always have its default value null
213         #pragma warning disable 649
214 
215         [Import(Name = "tlib_set_register_value_32")]
216         protected Action<int, uint> SetRegisterValue32;
217         [Import(Name = "tlib_get_register_value_32")]
218         protected Func<int, uint> GetRegisterValue32;
219 
220         #pragma warning restore 649
221 
222         private static readonly Dictionary<SparcRegisters, CPURegister> mapping = new Dictionary<SparcRegisters, CPURegister>
223         {
224             { SparcRegisters.R0,  new CPURegister(0, 32, isGeneral: true, isReadonly: false, aliases: new [] { "R0" }) },
225             { SparcRegisters.R1,  new CPURegister(1, 32, isGeneral: true, isReadonly: false, aliases: new [] { "R1" }) },
226             { SparcRegisters.R2,  new CPURegister(2, 32, isGeneral: true, isReadonly: false, aliases: new [] { "R2" }) },
227             { SparcRegisters.R3,  new CPURegister(3, 32, isGeneral: true, isReadonly: false, aliases: new [] { "R3" }) },
228             { SparcRegisters.R4,  new CPURegister(4, 32, isGeneral: true, isReadonly: false, aliases: new [] { "R4" }) },
229             { SparcRegisters.R5,  new CPURegister(5, 32, isGeneral: true, isReadonly: false, aliases: new [] { "R5" }) },
230             { SparcRegisters.R6,  new CPURegister(6, 32, isGeneral: true, isReadonly: false, aliases: new [] { "R6" }) },
231             { SparcRegisters.R7,  new CPURegister(7, 32, isGeneral: true, isReadonly: false, aliases: new [] { "R7" }) },
232             { SparcRegisters.R8,  new CPURegister(8, 32, isGeneral: true, isReadonly: false, aliases: new [] { "R8" }) },
233             { SparcRegisters.R9,  new CPURegister(9, 32, isGeneral: true, isReadonly: false, aliases: new [] { "R9" }) },
234             { SparcRegisters.R10,  new CPURegister(10, 32, isGeneral: true, isReadonly: false, aliases: new [] { "R10" }) },
235             { SparcRegisters.R11,  new CPURegister(11, 32, isGeneral: true, isReadonly: false, aliases: new [] { "R11" }) },
236             { SparcRegisters.R12,  new CPURegister(12, 32, isGeneral: true, isReadonly: false, aliases: new [] { "R12" }) },
237             { SparcRegisters.R13,  new CPURegister(13, 32, isGeneral: true, isReadonly: false, aliases: new [] { "R13" }) },
238             { SparcRegisters.R14,  new CPURegister(14, 32, isGeneral: true, isReadonly: false, aliases: new [] { "R14" }) },
239             { SparcRegisters.R15,  new CPURegister(15, 32, isGeneral: true, isReadonly: false, aliases: new [] { "R15" }) },
240             { SparcRegisters.R16,  new CPURegister(16, 32, isGeneral: true, isReadonly: false, aliases: new [] { "R16" }) },
241             { SparcRegisters.R17,  new CPURegister(17, 32, isGeneral: true, isReadonly: false, aliases: new [] { "R17" }) },
242             { SparcRegisters.R18,  new CPURegister(18, 32, isGeneral: true, isReadonly: false, aliases: new [] { "R18" }) },
243             { SparcRegisters.R19,  new CPURegister(19, 32, isGeneral: true, isReadonly: false, aliases: new [] { "R19" }) },
244             { SparcRegisters.R20,  new CPURegister(20, 32, isGeneral: true, isReadonly: false, aliases: new [] { "R20" }) },
245             { SparcRegisters.R21,  new CPURegister(21, 32, isGeneral: true, isReadonly: false, aliases: new [] { "R21" }) },
246             { SparcRegisters.R22,  new CPURegister(22, 32, isGeneral: true, isReadonly: false, aliases: new [] { "R22" }) },
247             { SparcRegisters.R23,  new CPURegister(23, 32, isGeneral: true, isReadonly: false, aliases: new [] { "R23" }) },
248             { SparcRegisters.R24,  new CPURegister(24, 32, isGeneral: true, isReadonly: false, aliases: new [] { "R24" }) },
249             { SparcRegisters.R25,  new CPURegister(25, 32, isGeneral: true, isReadonly: false, aliases: new [] { "R25" }) },
250             { SparcRegisters.R26,  new CPURegister(26, 32, isGeneral: true, isReadonly: false, aliases: new [] { "R26" }) },
251             { SparcRegisters.R27,  new CPURegister(27, 32, isGeneral: true, isReadonly: false, aliases: new [] { "R27" }) },
252             { SparcRegisters.R28,  new CPURegister(28, 32, isGeneral: true, isReadonly: false, aliases: new [] { "R28" }) },
253             { SparcRegisters.R29,  new CPURegister(29, 32, isGeneral: true, isReadonly: false, aliases: new [] { "R29" }) },
254             { SparcRegisters.R30,  new CPURegister(30, 32, isGeneral: true, isReadonly: false, aliases: new [] { "R30" }) },
255             { SparcRegisters.R31,  new CPURegister(31, 32, isGeneral: true, isReadonly: false, aliases: new [] { "R31" }) },
256             { SparcRegisters.ASR16,  new CPURegister(37, 32, isGeneral: true, isReadonly: false, aliases: new [] { "ASR16" }) },
257             { SparcRegisters.ASR17,  new CPURegister(38, 32, isGeneral: true, isReadonly: false, aliases: new [] { "ASR17" }) },
258             { SparcRegisters.ASR18,  new CPURegister(39, 32, isGeneral: true, isReadonly: false, aliases: new [] { "ASR18" }) },
259             { SparcRegisters.ASR19,  new CPURegister(40, 32, isGeneral: true, isReadonly: false, aliases: new [] { "ASR19" }) },
260             { SparcRegisters.ASR20,  new CPURegister(41, 32, isGeneral: true, isReadonly: false, aliases: new [] { "ASR20" }) },
261             { SparcRegisters.ASR21,  new CPURegister(42, 32, isGeneral: true, isReadonly: false, aliases: new [] { "ASR21" }) },
262             { SparcRegisters.ASR22,  new CPURegister(43, 32, isGeneral: true, isReadonly: false, aliases: new [] { "ASR22" }) },
263             { SparcRegisters.ASR23,  new CPURegister(44, 32, isGeneral: true, isReadonly: false, aliases: new [] { "ASR23" }) },
264             { SparcRegisters.ASR24,  new CPURegister(45, 32, isGeneral: true, isReadonly: false, aliases: new [] { "ASR24" }) },
265             { SparcRegisters.ASR25,  new CPURegister(46, 32, isGeneral: true, isReadonly: false, aliases: new [] { "ASR25" }) },
266             { SparcRegisters.ASR26,  new CPURegister(47, 32, isGeneral: true, isReadonly: false, aliases: new [] { "ASR26" }) },
267             { SparcRegisters.ASR27,  new CPURegister(48, 32, isGeneral: true, isReadonly: false, aliases: new [] { "ASR27" }) },
268             { SparcRegisters.ASR28,  new CPURegister(49, 32, isGeneral: true, isReadonly: false, aliases: new [] { "ASR28" }) },
269             { SparcRegisters.ASR29,  new CPURegister(50, 32, isGeneral: true, isReadonly: false, aliases: new [] { "ASR29" }) },
270             { SparcRegisters.ASR30,  new CPURegister(51, 32, isGeneral: true, isReadonly: false, aliases: new [] { "ASR30" }) },
271             { SparcRegisters.ASR31,  new CPURegister(52, 32, isGeneral: true, isReadonly: false, aliases: new [] { "ASR31" }) },
272             { SparcRegisters.Y,  new CPURegister(64, 32, isGeneral: true, isReadonly: false, aliases: new [] { "Y" }) },
273             { SparcRegisters.PSR,  new CPURegister(65, 32, isGeneral: true, isReadonly: false, aliases: new [] { "PSR" }) },
274             { SparcRegisters.WIM,  new CPURegister(66, 32, isGeneral: true, isReadonly: false, aliases: new [] { "WIM" }) },
275             { SparcRegisters.TBR,  new CPURegister(67, 32, isGeneral: true, isReadonly: false, aliases: new [] { "TBR" }) },
276             { SparcRegisters.PC,  new CPURegister(68, 32, isGeneral: true, isReadonly: false, aliases: new [] { "PC" }) },
277             { SparcRegisters.NPC,  new CPURegister(69, 32, isGeneral: true, isReadonly: false, aliases: new [] { "NPC" }) },
278             { SparcRegisters.FSR,  new CPURegister(70, 32, isGeneral: false, isReadonly: false, aliases: new [] { "FSR" }) },
279             { SparcRegisters.CSR,  new CPURegister(71, 32, isGeneral: false, isReadonly: false, aliases: new [] { "CSR" }) },
280         };
281     }
282 
283     public enum SparcRegisters
284     {
285         Y = 64,
286         PSR = 65,
287         WIM = 66,
288         TBR = 67,
289         PC = 68,
290         NPC = 69,
291         FSR = 70,
292         CSR = 71,
293         R0 = 0,
294         R1 = 1,
295         R2 = 2,
296         R3 = 3,
297         R4 = 4,
298         R5 = 5,
299         R6 = 6,
300         R7 = 7,
301         R8 = 8,
302         R9 = 9,
303         R10 = 10,
304         R11 = 11,
305         R12 = 12,
306         R13 = 13,
307         R14 = 14,
308         R15 = 15,
309         R16 = 16,
310         R17 = 17,
311         R18 = 18,
312         R19 = 19,
313         R20 = 20,
314         R21 = 21,
315         R22 = 22,
316         R23 = 23,
317         R24 = 24,
318         R25 = 25,
319         R26 = 26,
320         R27 = 27,
321         R28 = 28,
322         R29 = 29,
323         R30 = 30,
324         R31 = 31,
325         ASR16 = 37,
326         ASR17 = 38,
327         ASR18 = 39,
328         ASR19 = 40,
329         ASR20 = 41,
330         ASR21 = 42,
331         ASR22 = 43,
332         ASR23 = 44,
333         ASR24 = 45,
334         ASR25 = 46,
335         ASR26 = 47,
336         ASR27 = 48,
337         ASR28 = 49,
338         ASR29 = 50,
339         ASR30 = 51,
340         ASR31 = 52,
341     }
342 }
343