1 //
2 // Copyright (c) 2010-2024 Antmicro
3 //
4 // This file is licensed under the MIT License.
5 // Full license text is available in 'licenses/MIT.txt'.
6 //
7 using System.Collections.Generic;
8 using Antmicro.Renode.Core;
9 using Antmicro.Renode.Peripherals.Timers;
10 using Endianess = ELFSharp.ELF.Endianess;
11 
12 namespace Antmicro.Renode.Peripherals.CPU
13 {
14     public partial class RiscV64 : BaseRiscV
15     {
RiscV64( IMachine machine, string cpuType, IRiscVTimeProvider timeProvider = null, uint hartId = 0, [NameAlias(R)] PrivilegedArchitecture privilegedArchitecture = PrivilegedArchitecture.Priv1_11, Endianess endianness = Endianess.LittleEndian, ulong? nmiVectorAddress = null, uint? nmiVectorLength = null, bool allowUnalignedAccesses = false, uint pmpNumberOfAddrBits = 54, InterruptMode interruptMode = InterruptMode.Auto, PrivilegeLevels privilegeLevels = PrivilegeLevels.MachineSupervisorUser )16         public RiscV64(
17             IMachine machine,
18             string cpuType,
19             IRiscVTimeProvider timeProvider = null,
20             uint hartId = 0,
21             [NameAlias("privilegeArchitecture")] PrivilegedArchitecture privilegedArchitecture = PrivilegedArchitecture.Priv1_11,
22             Endianess endianness = Endianess.LittleEndian,
23             ulong? nmiVectorAddress = null,
24             uint? nmiVectorLength = null,
25             bool allowUnalignedAccesses = false,
26             uint pmpNumberOfAddrBits = 54,
27             InterruptMode interruptMode = InterruptMode.Auto,
28             PrivilegeLevels privilegeLevels = PrivilegeLevels.MachineSupervisorUser
29         )
30             : base(timeProvider, hartId, cpuType, machine, privilegedArchitecture, endianness, CpuBitness.Bits64, nmiVectorAddress, nmiVectorLength,
31                     allowUnalignedAccesses, interruptMode, privilegeLevels: privilegeLevels, pmpNumberOfAddrBits: pmpNumberOfAddrBits)
32         {
33         }
34 
35         public override string Architecture { get { return "riscv64"; } }
36 
37         public override string GDBArchitecture { get { return "riscv:rv64"; } }
38 
39         public override RegisterValue VLEN => VLENB * 8u;
40 
41         protected override byte MostSignificantBit => 63;
42 
BeforePCWrite(ulong value)43         private ulong BeforePCWrite(ulong value)
44         {
45             PCWritten();
46             return value;
47         }
48     }
49 }
50