1 /******************************************************** 2 * 3 * Warning! 4 * This file was generated automatically. 5 * Please do not edit. Changes should be made in the 6 * appropriate *.tt file. 7 * 8 */ 9 using System; 10 using System.Linq; 11 using System.Collections.Generic; 12 using Antmicro.Renode.Peripherals.CPU.Registers; 13 using Antmicro.Renode.Utilities.Binding; 14 using Antmicro.Renode.Exceptions; 15 16 namespace Antmicro.Renode.Peripherals.CPU 17 { 18 public partial class PowerPc64 19 { SetRegister(int register, RegisterValue value)20 public override void SetRegister(int register, RegisterValue value) 21 { 22 if(!mapping.TryGetValue((PowerPc64Registers)register, out var r)) 23 { 24 throw new RecoverableException($"Wrong register index: {register}"); 25 } 26 27 SetRegisterValue64(r.Index, checked((ulong)value)); 28 } 29 GetRegister(int register)30 public override RegisterValue GetRegister(int register) 31 { 32 if(!mapping.TryGetValue((PowerPc64Registers)register, out var r)) 33 { 34 throw new RecoverableException($"Wrong register index: {register}"); 35 } 36 return GetRegisterValue64(r.Index); 37 } 38 GetRegisters()39 public override IEnumerable<CPURegister> GetRegisters() 40 { 41 return mapping.Values.OrderBy(x => x.Index); 42 } 43 44 [Register] 45 public RegisterValue NIP 46 { 47 get 48 { 49 return GetRegisterValue64((int)PowerPc64Registers.NIP); 50 } 51 set 52 { 53 SetRegisterValue64((int)PowerPc64Registers.NIP, value); 54 } 55 } 56 [Register] 57 public RegisterValue MSR 58 { 59 get 60 { 61 return GetRegisterValue64((int)PowerPc64Registers.MSR); 62 } 63 set 64 { 65 SetRegisterValue64((int)PowerPc64Registers.MSR, value); 66 } 67 } 68 [Register] 69 public RegisterValue LR 70 { 71 get 72 { 73 return GetRegisterValue64((int)PowerPc64Registers.LR); 74 } 75 set 76 { 77 SetRegisterValue64((int)PowerPc64Registers.LR, value); 78 } 79 } 80 [Register] 81 public RegisterValue CTR 82 { 83 get 84 { 85 return GetRegisterValue64((int)PowerPc64Registers.CTR); 86 } 87 set 88 { 89 SetRegisterValue64((int)PowerPc64Registers.CTR, value); 90 } 91 } 92 [Register] 93 public RegisterValue XER 94 { 95 get 96 { 97 return GetRegisterValue64((int)PowerPc64Registers.XER); 98 } 99 set 100 { 101 SetRegisterValue64((int)PowerPc64Registers.XER, value); 102 } 103 } 104 [Register] 105 public override RegisterValue PC 106 { 107 get 108 { 109 return GetRegisterValue64((int)PowerPc64Registers.PC); 110 } 111 set 112 { 113 SetRegisterValue64((int)PowerPc64Registers.PC, value); 114 } 115 } 116 public RegistersGroup R { get; private set; } 117 InitializeRegisters()118 protected override void InitializeRegisters() 119 { 120 var indexValueMapR = new Dictionary<int, PowerPc64Registers> 121 { 122 { 0, PowerPc64Registers.R0 }, 123 { 1, PowerPc64Registers.R1 }, 124 { 2, PowerPc64Registers.R2 }, 125 { 3, PowerPc64Registers.R3 }, 126 { 4, PowerPc64Registers.R4 }, 127 { 5, PowerPc64Registers.R5 }, 128 { 6, PowerPc64Registers.R6 }, 129 { 7, PowerPc64Registers.R7 }, 130 { 8, PowerPc64Registers.R8 }, 131 { 9, PowerPc64Registers.R9 }, 132 { 10, PowerPc64Registers.R10 }, 133 { 11, PowerPc64Registers.R11 }, 134 { 12, PowerPc64Registers.R12 }, 135 { 13, PowerPc64Registers.R13 }, 136 { 14, PowerPc64Registers.R14 }, 137 { 15, PowerPc64Registers.R15 }, 138 { 16, PowerPc64Registers.R16 }, 139 { 17, PowerPc64Registers.R17 }, 140 { 18, PowerPc64Registers.R18 }, 141 { 19, PowerPc64Registers.R19 }, 142 { 20, PowerPc64Registers.R20 }, 143 { 21, PowerPc64Registers.R21 }, 144 { 22, PowerPc64Registers.R22 }, 145 { 23, PowerPc64Registers.R23 }, 146 { 24, PowerPc64Registers.R24 }, 147 { 25, PowerPc64Registers.R25 }, 148 { 26, PowerPc64Registers.R26 }, 149 { 27, PowerPc64Registers.R27 }, 150 { 28, PowerPc64Registers.R28 }, 151 { 29, PowerPc64Registers.R29 }, 152 { 30, PowerPc64Registers.R30 }, 153 { 31, PowerPc64Registers.R31 }, 154 }; 155 R = new RegistersGroup( 156 indexValueMapR.Keys, 157 i => GetRegister((int)indexValueMapR[i]), 158 (i, v) => SetRegister((int)indexValueMapR[i], v)); 159 160 } 161 162 // 649: Field '...' is never assigned to, and will always have its default value null 163 #pragma warning disable 649 164 165 [Import(Name = "tlib_set_register_value_64")] 166 protected Action<int, ulong> SetRegisterValue64; 167 [Import(Name = "tlib_get_register_value_64")] 168 protected Func<int, ulong> GetRegisterValue64; 169 170 #pragma warning restore 649 171 172 private static readonly Dictionary<PowerPc64Registers, CPURegister> mapping = new Dictionary<PowerPc64Registers, CPURegister> 173 { 174 { PowerPc64Registers.R0, new CPURegister(0, 64, isGeneral: true, isReadonly: false, aliases: new [] { "R0" }) }, 175 { PowerPc64Registers.R1, new CPURegister(1, 64, isGeneral: true, isReadonly: false, aliases: new [] { "R1" }) }, 176 { PowerPc64Registers.R2, new CPURegister(2, 64, isGeneral: true, isReadonly: false, aliases: new [] { "R2" }) }, 177 { PowerPc64Registers.R3, new CPURegister(3, 64, isGeneral: true, isReadonly: false, aliases: new [] { "R3" }) }, 178 { PowerPc64Registers.R4, new CPURegister(4, 64, isGeneral: true, isReadonly: false, aliases: new [] { "R4" }) }, 179 { PowerPc64Registers.R5, new CPURegister(5, 64, isGeneral: true, isReadonly: false, aliases: new [] { "R5" }) }, 180 { PowerPc64Registers.R6, new CPURegister(6, 64, isGeneral: true, isReadonly: false, aliases: new [] { "R6" }) }, 181 { PowerPc64Registers.R7, new CPURegister(7, 64, isGeneral: true, isReadonly: false, aliases: new [] { "R7" }) }, 182 { PowerPc64Registers.R8, new CPURegister(8, 64, isGeneral: true, isReadonly: false, aliases: new [] { "R8" }) }, 183 { PowerPc64Registers.R9, new CPURegister(9, 64, isGeneral: true, isReadonly: false, aliases: new [] { "R9" }) }, 184 { PowerPc64Registers.R10, new CPURegister(10, 64, isGeneral: true, isReadonly: false, aliases: new [] { "R10" }) }, 185 { PowerPc64Registers.R11, new CPURegister(11, 64, isGeneral: true, isReadonly: false, aliases: new [] { "R11" }) }, 186 { PowerPc64Registers.R12, new CPURegister(12, 64, isGeneral: true, isReadonly: false, aliases: new [] { "R12" }) }, 187 { PowerPc64Registers.R13, new CPURegister(13, 64, isGeneral: true, isReadonly: false, aliases: new [] { "R13" }) }, 188 { PowerPc64Registers.R14, new CPURegister(14, 64, isGeneral: true, isReadonly: false, aliases: new [] { "R14" }) }, 189 { PowerPc64Registers.R15, new CPURegister(15, 64, isGeneral: true, isReadonly: false, aliases: new [] { "R15" }) }, 190 { PowerPc64Registers.R16, new CPURegister(16, 64, isGeneral: true, isReadonly: false, aliases: new [] { "R16" }) }, 191 { PowerPc64Registers.R17, new CPURegister(17, 64, isGeneral: true, isReadonly: false, aliases: new [] { "R17" }) }, 192 { PowerPc64Registers.R18, new CPURegister(18, 64, isGeneral: true, isReadonly: false, aliases: new [] { "R18" }) }, 193 { PowerPc64Registers.R19, new CPURegister(19, 64, isGeneral: true, isReadonly: false, aliases: new [] { "R19" }) }, 194 { PowerPc64Registers.R20, new CPURegister(20, 64, isGeneral: true, isReadonly: false, aliases: new [] { "R20" }) }, 195 { PowerPc64Registers.R21, new CPURegister(21, 64, isGeneral: true, isReadonly: false, aliases: new [] { "R21" }) }, 196 { PowerPc64Registers.R22, new CPURegister(22, 64, isGeneral: true, isReadonly: false, aliases: new [] { "R22" }) }, 197 { PowerPc64Registers.R23, new CPURegister(23, 64, isGeneral: true, isReadonly: false, aliases: new [] { "R23" }) }, 198 { PowerPc64Registers.R24, new CPURegister(24, 64, isGeneral: true, isReadonly: false, aliases: new [] { "R24" }) }, 199 { PowerPc64Registers.R25, new CPURegister(25, 64, isGeneral: true, isReadonly: false, aliases: new [] { "R25" }) }, 200 { PowerPc64Registers.R26, new CPURegister(26, 64, isGeneral: true, isReadonly: false, aliases: new [] { "R26" }) }, 201 { PowerPc64Registers.R27, new CPURegister(27, 64, isGeneral: true, isReadonly: false, aliases: new [] { "R27" }) }, 202 { PowerPc64Registers.R28, new CPURegister(28, 64, isGeneral: true, isReadonly: false, aliases: new [] { "R28" }) }, 203 { PowerPc64Registers.R29, new CPURegister(29, 64, isGeneral: true, isReadonly: false, aliases: new [] { "R29" }) }, 204 { PowerPc64Registers.R30, new CPURegister(30, 64, isGeneral: true, isReadonly: false, aliases: new [] { "R30" }) }, 205 { PowerPc64Registers.R31, new CPURegister(31, 64, isGeneral: true, isReadonly: false, aliases: new [] { "R31" }) }, 206 { PowerPc64Registers.NIP, new CPURegister(64, 64, isGeneral: true, isReadonly: false, aliases: new [] { "NIP", "PC" }) }, 207 { PowerPc64Registers.MSR, new CPURegister(65, 64, isGeneral: false, isReadonly: false, aliases: new [] { "MSR" }) }, 208 { PowerPc64Registers.LR, new CPURegister(67, 64, isGeneral: false, isReadonly: false, aliases: new [] { "LR" }) }, 209 { PowerPc64Registers.CTR, new CPURegister(68, 64, isGeneral: false, isReadonly: false, aliases: new [] { "CTR" }) }, 210 { PowerPc64Registers.XER, new CPURegister(69, 64, isGeneral: false, isReadonly: false, aliases: new [] { "XER" }) }, 211 }; 212 } 213 214 public enum PowerPc64Registers 215 { 216 NIP = 64, 217 MSR = 65, 218 LR = 67, 219 CTR = 68, 220 XER = 69, 221 PC = 64, 222 R0 = 0, 223 R1 = 1, 224 R2 = 2, 225 R3 = 3, 226 R4 = 4, 227 R5 = 5, 228 R6 = 6, 229 R7 = 7, 230 R8 = 8, 231 R9 = 9, 232 R10 = 10, 233 R11 = 11, 234 R12 = 12, 235 R13 = 13, 236 R14 = 14, 237 R15 = 15, 238 R16 = 16, 239 R17 = 17, 240 R18 = 18, 241 R19 = 19, 242 R20 = 20, 243 R21 = 21, 244 R22 = 22, 245 R23 = 23, 246 R24 = 24, 247 R25 = 25, 248 R26 = 26, 249 R27 = 27, 250 R28 = 28, 251 R29 = 29, 252 R30 = 30, 253 R31 = 31, 254 } 255 } 256