| /Renode-Infrastructure-v1.15.3-29f510e/src/Emulator/Cores/X86/ |
| D | X86.cs | 21 public override string Architecture { get { return "i386"; } } property in Antmicro.Renode.Peripherals.CPU.X86
23 public override string GDBArchitecture { get { return Architecture; } }
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| D | X86_64.cs | 21 public override string Architecture { get { return "x86_64"; } } property in Antmicro.Renode.Peripherals.CPU.X86_64
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| /Renode-Infrastructure-v1.15.3-29f510e/src/Emulator/Peripherals/Peripherals/CPU/ |
| D | LLVMArchitectureMapping.cs | 17 return SupportedArchitectures.ContainsKey(cpu.Architecture); in IsSupported()
22 triple = SupportedArchitectures[cpu.Architecture]; in GetTripleAndModelKey()
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| D | ExternalCPU.cs | 99 public override string Architecture => "Unknown"; field in Antmicro.Renode.Peripherals.CPU.ExternalCPU
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| D | TranslationCPU.cs | 554 if(!Architecture.Contains("riscv") && !Architecture.Contains("arm")) in AddHookAtInterruptEnd()
1311 …var endianSuffix = (Endianness == Endianess.BigEndian || Architecture.StartsWith("ppc")) ? "be" : … in Init()
1312 …ibraryResource = string.Format("Antmicro.Renode.translate-{0}-{1}.so", Architecture, endianSuffix); in Init()
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| D | BaseCPU.cs | 170 public abstract string Architecture { get; } property in Antmicro.Renode.Peripherals.CPU.BaseCPU
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| /Renode-Infrastructure-v1.15.3-29f510e/src/Emulator/Main/Tests/UnitTests/Mocks/ |
| D | EmptyCPU.cs | 37 public override string Architecture => "empty"; field in Antmicro.Renode.UnitTests.Mocks.EmptyCPU
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| /Renode-Infrastructure-v1.15.3-29f510e/src/Emulator/Cores/Sparc/ |
| D | Sparc.cs | 31 public override string Architecture { get { return "sparc"; } } property in Antmicro.Renode.Peripherals.CPU.Sparc
33 public override string GDBArchitecture { get { return Architecture; } }
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| /Renode-Infrastructure-v1.15.3-29f510e/src/Emulator/Cores/RiscV/ |
| D | RiscV32.cs | 35 public override string Architecture { get { return "riscv"; } } property in Antmicro.Renode.Peripherals.CPU.RiscV32
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| D | RiscV64.cs | 35 public override string Architecture { get { return "riscv64"; } } property in Antmicro.Renode.Peripherals.CPU.RiscV64
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| D | RiscvOpcodesParser.cs | 59 if(cpu.Architecture == "riscv") in EnableRiscvOpcodesCounting()
63 else if(cpu.Architecture == "riscv64") in EnableRiscvOpcodesCounting()
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| D | Andes_AndeStarV5Extension.cs | 43 …cpu.RegisterCSR((ulong)CustomCSR.Architecture, () => 0x0, value => { cpu.Log(LogLevel.Warning, "Wr… in RegisterInternal()
215 Architecture = 0xfca, enumerator
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| /Renode-Infrastructure-v1.15.3-29f510e/src/Emulator/Main/Peripherals/CPU/ |
| D | ICPU.cs | 20 string Architecture { get; } property
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| /Renode-Infrastructure-v1.15.3-29f510e/src/Emulator/Peripherals/Peripherals/CPU/Disassembler/ |
| D | LLVMDisassembler.cs | 80 if(cpu.Architecture == "arm-m") in GetDisassembler()
84 else if(cpu.Architecture == "riscv" || cpu.Architecture == "riscv64") in GetDisassembler()
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| /Renode-Infrastructure-v1.15.3-29f510e/src/Emulator/Peripherals/Peripherals/CPU/ExecutionTracer/ |
| D | ExecutionTracer.cs | 166 if(AttachedCPU.Architecture == "i386") in TrackMemoryAccesses()
181 …if(!(AttachedCPU is ICPUWithPostOpcodeExecutionHooks) || !(AttachedCPU.Architecture.StartsWith("ri… in TrackVectorConfiguration()
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| /Renode-Infrastructure-v1.15.3-29f510e/src/Emulator/Main/Tests/UnitTests/ |
| D | MultiCPUTests.cs | 32 …mock.Setup(cpu => cpu.Architecture).Returns("mock"); // Required by InitializeInvalidatedAddresse… in ShouldEnumerateCPUs()
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| D | SystemBusTests.cs | 130 …cpuMock.Setup(cpu => cpu.Architecture).Returns("mock"); // Required by InitializeInvalidatedAddre… in ShouldPauseAndResumeOnlyOnce()
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| /Renode-Infrastructure-v1.15.3-29f510e/src/Emulator/Cores/Xtensa/ |
| D | Xtensa.cs | 63 public override string Architecture { get { return "xtensa"; } } property in Antmicro.Renode.Peripherals.CPU.Xtensa
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| /Renode-Infrastructure-v1.15.3-29f510e/src/Emulator/Cores/PowerPC/ |
| D | PowerPc64.cs | 74 public override string Architecture { get { return "ppc64"; } } property in Antmicro.Renode.Peripherals.CPU.PowerPc64
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| D | PowerPc.cs | 73 public override string Architecture { get { return "ppc"; } } property in Antmicro.Renode.Peripherals.CPU.PowerPc
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| /Renode-Infrastructure-v1.15.3-29f510e/src/Emulator/Cores/Arm/ |
| D | Arm.cs | 78 public override string Architecture { get { return "arm"; } } property in Antmicro.Renode.Peripherals.CPU.Arm
95 DebugHelper.Assert(Architecture == "arm");
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| /Renode-Infrastructure-v1.15.3-29f510e/src/Emulator/Cores/Arm64/ |
| D | ARMv8R.cs | 107 public override string Architecture { get { return "arm64"; } } property in Antmicro.Renode.Peripherals.CPU.ARMv8R
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| D | ARMv8A.cs | 130 public override string Architecture { get { return "arm64"; } } property in Antmicro.Renode.Peripherals.CPU.ARMv8A
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| /Renode-Infrastructure-v1.15.3-29f510e/src/Emulator/Main/Core/ |
| D | Machine.cs | 1401 …if(!invalidatedAddressesByArchitecture.TryGetValue(cpu.Architecture, out var newInvalidatedAddress… in InitializeInvalidatedAddressesList()
1404 … invalidatedAddressesByArchitecture.Add(cpu.Architecture, newInvalidatedAddressesList); in InitializeInvalidatedAddressesList()
1422 if(cpu.Architecture == null) in Register()
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| /Renode-Infrastructure-v1.15.3-29f510e/src/Emulator/Cores/Arm-M/ |
| D | CortexM.cs | 106 public override string Architecture { get { return "arm-m"; } } property in Antmicro.Renode.Peripherals.CPU.CortexM
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