1 /* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */ 2 /* 3 * Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved. 4 */ 5 6 #ifndef __DT_BINDINGS_INTERCONNECT_QCOM_QDU1000_H 7 #define __DT_BINDINGS_INTERCONNECT_QCOM_QDU1000_H 8 9 #define MASTER_QUP_CORE_0 0 10 #define MASTER_QUP_CORE_1 1 11 #define SLAVE_QUP_CORE_0 2 12 #define SLAVE_QUP_CORE_1 3 13 14 #define MASTER_SYS_TCU 0 15 #define MASTER_APPSS_PROC 1 16 #define MASTER_GEMNOC_ECPRI_DMA 2 17 #define MASTER_FEC_2_GEMNOC 3 18 #define MASTER_ANOC_PCIE_GEM_NOC 4 19 #define MASTER_SNOC_GC_MEM_NOC 5 20 #define MASTER_SNOC_SF_MEM_NOC 6 21 #define MASTER_MSS_PROC 7 22 #define SLAVE_GEM_NOC_CNOC 8 23 #define SLAVE_LLCC 9 24 #define SLAVE_GEMNOC_MODEM_CNOC 10 25 #define SLAVE_MEM_NOC_PCIE_SNOC 11 26 27 #define MASTER_LLCC 0 28 #define SLAVE_EBI1 1 29 30 #define MASTER_GIC_AHB 0 31 #define MASTER_QDSS_BAM 1 32 #define MASTER_QPIC 2 33 #define MASTER_QSPI_0 3 34 #define MASTER_QUP_0 4 35 #define MASTER_QUP_1 5 36 #define MASTER_SNOC_CFG 6 37 #define MASTER_ANOC_SNOC 7 38 #define MASTER_ANOC_GSI 8 39 #define MASTER_GEM_NOC_CNOC 9 40 #define MASTER_GEMNOC_MODEM_CNOC 10 41 #define MASTER_GEM_NOC_PCIE_SNOC 11 42 #define MASTER_CRYPTO 12 43 #define MASTER_ECPRI_GSI 13 44 #define MASTER_PIMEM 14 45 #define MASTER_SNOC_ECPRI_DMA 15 46 #define MASTER_GIC 16 47 #define MASTER_PCIE 17 48 #define MASTER_QDSS_ETR 18 49 #define MASTER_QDSS_ETR_1 19 50 #define MASTER_SDCC_1 20 51 #define MASTER_USB3 21 52 #define SLAVE_AHB2PHY_SOUTH 22 53 #define SLAVE_AHB2PHY_NORTH 23 54 #define SLAVE_AHB2PHY_EAST 24 55 #define SLAVE_AOSS 25 56 #define SLAVE_CLK_CTL 26 57 #define SLAVE_RBCPR_CX_CFG 27 58 #define SLAVE_RBCPR_MX_CFG 28 59 #define SLAVE_CRYPTO_0_CFG 29 60 #define SLAVE_ECPRI_CFG 30 61 #define SLAVE_IMEM_CFG 31 62 #define SLAVE_IPC_ROUTER_CFG 32 63 #define SLAVE_CNOC_MSS 33 64 #define SLAVE_PCIE_CFG 34 65 #define SLAVE_PDM 35 66 #define SLAVE_PIMEM_CFG 36 67 #define SLAVE_PRNG 37 68 #define SLAVE_QDSS_CFG 38 69 #define SLAVE_QPIC 40 70 #define SLAVE_QSPI_0 41 71 #define SLAVE_QUP_0 42 72 #define SLAVE_QUP_1 43 73 #define SLAVE_SDCC_2 44 74 #define SLAVE_SMBUS_CFG 45 75 #define SLAVE_SNOC_CFG 46 76 #define SLAVE_TCSR 47 77 #define SLAVE_TLMM 48 78 #define SLAVE_TME_CFG 49 79 #define SLAVE_TSC_CFG 50 80 #define SLAVE_USB3_0 51 81 #define SLAVE_VSENSE_CTRL_CFG 52 82 #define SLAVE_A1NOC_SNOC 53 83 #define SLAVE_ANOC_SNOC_GSI 54 84 #define SLAVE_DDRSS_CFG 55 85 #define SLAVE_ECPRI_GEMNOC 56 86 #define SLAVE_SNOC_GEM_NOC_GC 57 87 #define SLAVE_SNOC_GEM_NOC_SF 58 88 #define SLAVE_MODEM_OFFLINE 59 89 #define SLAVE_ANOC_PCIE_GEM_NOC 60 90 #define SLAVE_IMEM 61 91 #define SLAVE_PIMEM 62 92 #define SLAVE_SERVICE_SNOC 63 93 #define SLAVE_ETHERNET_SS 64 94 #define SLAVE_PCIE_0 65 95 #define SLAVE_QDSS_STM 66 96 #define SLAVE_TCU 67 97 98 #endif 99
